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@ -38,7 +38,7 @@ |
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#define ETH_FCS_LEN 4 |
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#define ETH_FCS_LEN 4 |
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#define AG71XX_DRV_NAME "ag71xx" |
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#define AG71XX_DRV_NAME "ag71xx" |
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#define AG71XX_DRV_VERSION "0.5.23" |
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#define AG71XX_DRV_VERSION "0.5.24" |
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#define AG71XX_NAPI_WEIGHT 64 |
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#define AG71XX_NAPI_WEIGHT 64 |
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#define AG71XX_OOM_REFILL (1 + HZ/10) |
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#define AG71XX_OOM_REFILL (1 + HZ/10) |
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@ -110,7 +110,6 @@ struct ag71xx_mdio { |
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struct ag71xx { |
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struct ag71xx { |
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void __iomem *mac_base; |
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void __iomem *mac_base; |
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void __iomem *mac_base2; |
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void __iomem *mii_ctrl; |
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void __iomem *mii_ctrl; |
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spinlock_t lock; |
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spinlock_t lock; |
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@ -314,14 +313,12 @@ static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value) |
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switch (reg) { |
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switch (reg) { |
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case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: |
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case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: |
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r = ag->mac_base + reg; |
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__raw_writel(value, r); |
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__raw_readl(r); |
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break; |
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case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS: |
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case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS: |
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r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL; |
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r = ag->mac_base + reg; |
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__raw_writel(value, r); |
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__raw_writel(value, r); |
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__raw_readl(r); |
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/* flush write */ |
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(void) __raw_readl(r); |
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break; |
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break; |
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default: |
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default: |
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BUG(); |
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BUG(); |
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@ -335,11 +332,8 @@ static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg) |
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switch (reg) { |
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switch (reg) { |
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case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: |
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case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: |
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r = ag->mac_base + reg; |
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ret = __raw_readl(r); |
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break; |
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case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS: |
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case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS: |
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r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL; |
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r = ag->mac_base + reg; |
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ret = __raw_readl(r); |
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ret = __raw_readl(r); |
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break; |
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break; |
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default: |
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default: |
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@ -355,14 +349,12 @@ static inline void ag71xx_sb(struct ag71xx *ag, unsigned reg, u32 mask) |
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switch (reg) { |
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switch (reg) { |
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case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: |
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case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: |
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r = ag->mac_base + reg; |
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__raw_writel(__raw_readl(r) | mask, r); |
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__raw_readl(r); |
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break; |
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case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS: |
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case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS: |
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r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL; |
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r = ag->mac_base + reg; |
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__raw_writel(__raw_readl(r) | mask, r); |
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__raw_writel(__raw_readl(r) | mask, r); |
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__raw_readl(r); |
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/* flush write */ |
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(void)__raw_readl(r); |
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break; |
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break; |
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default: |
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default: |
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BUG(); |
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BUG(); |
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@ -375,14 +367,12 @@ static inline void ag71xx_cb(struct ag71xx *ag, unsigned reg, u32 mask) |
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switch (reg) { |
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switch (reg) { |
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case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: |
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case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: |
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r = ag->mac_base + reg; |
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__raw_writel(__raw_readl(r) & ~mask, r); |
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__raw_readl(r); |
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break; |
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case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS: |
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case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS: |
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r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL; |
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r = ag->mac_base + reg; |
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__raw_writel(__raw_readl(r) & ~mask, r); |
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__raw_writel(__raw_readl(r) & ~mask, r); |
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__raw_readl(r); |
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/* flush write */ |
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(void) __raw_readl(r); |
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break; |
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break; |
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default: |
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default: |
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BUG(); |
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BUG(); |
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@ -407,6 +397,8 @@ static inline void ag71xx_mii_ctrl_wr(struct ag71xx *ag, u32 value) |
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return; |
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return; |
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__raw_writel(value, ag->mii_ctrl); |
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__raw_writel(value, ag->mii_ctrl); |
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/* flush write */ |
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__raw_readl(ag->mii_ctrl); |
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__raw_readl(ag->mii_ctrl); |
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} |
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} |
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