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@ -105,9 +105,20 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org> |
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ret = platform_device_register(pdev);
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ret = platform_device_register(pdev);
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if (ret)
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if (ret)
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return ret;
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return ret;
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@@ -248,6 +303,10 @@ bcm63xx_enetsw_register(const struct bcm
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else if (BCMCPU_IS_6368())
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enetsw_pd.num_ports = ENETSW_PORTS_6368;
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+ enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
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+ enetsw_pd.dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK;
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+ enetsw_pd.dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK;
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+
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ret = platform_device_register(&bcm63xx_enetsw_device);
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if (ret)
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return ret;
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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@@ -709,6 +709,8 @@
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@@ -715,6 +715,8 @@
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/*************************************************************************
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/*************************************************************************
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* _REG relative to RSET_ENETDMA
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* _REG relative to RSET_ENETDMA
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*************************************************************************/
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*************************************************************************/
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@ -116,7 +127,7 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org> |
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/* Controller Configuration Register */
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/* Controller Configuration Register */
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#define ENETDMA_CFG_REG (0x0)
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#define ENETDMA_CFG_REG (0x0)
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@@ -758,29 +760,54 @@
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@@ -764,29 +766,54 @@
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/* State Ram Word 4 */
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/* State Ram Word 4 */
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#define ENETDMA_SRAM4_REG(x) (0x20c + (x) * 0x10)
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#define ENETDMA_SRAM4_REG(x) (0x20c + (x) * 0x10)
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@ -175,7 +186,7 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org> |
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/*************************************************************************
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/*************************************************************************
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@@ -788,16 +815,16 @@
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@@ -794,16 +821,16 @@
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*************************************************************************/
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*************************************************************************/
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/* Ring Start Address register */
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/* Ring Start Address register */
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@ -536,8 +547,8 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org> |
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/* mask all interrupts and request them */
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/* mask all interrupts and request them */
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- enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
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- enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
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- enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
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- enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
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+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG, priv->rx_chan);
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+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);
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+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG, priv->tx_chan);
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+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->tx_chan);
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ret = request_irq(priv->irq_rx, bcm_enet_isr_dma,
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ret = request_irq(priv->irq_rx, bcm_enet_isr_dma,
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IRQF_DISABLED, dev->name, dev);
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IRQF_DISABLED, dev->name, dev);
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@ -568,10 +579,10 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org> |
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/* set dma maximum burst len */
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/* set dma maximum burst len */
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enet_dmac_writel(priv, priv->dma_maxburst,
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enet_dmac_writel(priv, priv->dma_maxburst,
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- ENETDMAC_MAXBURST_REG(priv->rx_chan));
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- ENETDMAC_MAXBURST_REG(priv->rx_chan));
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+ ENETDMAC_MAXBURST_REG, priv->rx_chan);
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+ ENETDMAC_MAXBURST, priv->rx_chan);
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enet_dmac_writel(priv, priv->dma_maxburst,
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enet_dmac_writel(priv, priv->dma_maxburst,
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- ENETDMAC_MAXBURST_REG(priv->tx_chan));
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- ENETDMAC_MAXBURST_REG(priv->tx_chan));
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+ ENETDMAC_MAXBURST_REG, priv->tx_chan);
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+ ENETDMAC_MAXBURST, priv->tx_chan);
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/* set flow control low/high threshold to 1/3 / 2/3 */
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/* set flow control low/high threshold to 1/3 / 2/3 */
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val = priv->rx_ring_size / 3;
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val = priv->rx_ring_size / 3;
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@ -580,25 +591,25 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org> |
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enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
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enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
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enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
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enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
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- ENETDMAC_CHANCFG_REG(priv->rx_chan));
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- ENETDMAC_CHANCFG_REG(priv->rx_chan));
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+ ENETDMAC_CHANCFG_REG, priv->rx_chan);
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+ ENETDMAC_CHANCFG, priv->rx_chan);
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/* watch "packet transferred" interrupt in rx and tx */
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/* watch "packet transferred" interrupt in rx and tx */
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enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
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enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
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- ENETDMAC_IR_REG(priv->rx_chan));
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- ENETDMAC_IR_REG(priv->rx_chan));
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+ ENETDMAC_IR_REG, priv->rx_chan);
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+ ENETDMAC_IR, priv->rx_chan);
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enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
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enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
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- ENETDMAC_IR_REG(priv->tx_chan));
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- ENETDMAC_IR_REG(priv->tx_chan));
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+ ENETDMAC_IR_REG, priv->tx_chan);
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+ ENETDMAC_IR, priv->tx_chan);
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/* make sure we enable napi before rx interrupt */
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/* make sure we enable napi before rx interrupt */
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napi_enable(&priv->napi);
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napi_enable(&priv->napi);
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enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
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enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
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- ENETDMAC_IRMASK_REG(priv->rx_chan));
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- ENETDMAC_IRMASK_REG(priv->rx_chan));
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+ ENETDMAC_IRMASK_REG, priv->rx_chan);
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+ ENETDMAC_IRMASK, priv->rx_chan);
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enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
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enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
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- ENETDMAC_IRMASK_REG(priv->tx_chan));
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- ENETDMAC_IRMASK_REG(priv->tx_chan));
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+ ENETDMAC_IRMASK_REG, priv->tx_chan);
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+ ENETDMAC_IRMASK, priv->tx_chan);
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netif_carrier_on(dev);
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netif_carrier_on(dev);
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netif_start_queue(dev);
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netif_start_queue(dev);
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@ -608,11 +619,21 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org> |
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/* mask all interrupts */
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/* mask all interrupts */
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- enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
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- enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
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- enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
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- enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
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+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG, priv->rx_chan);
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+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);
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+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG, priv->tx_chan);
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+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->tx_chan);
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/* disable dma & mac */
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/* disable dma & mac */
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bcm_enet_disable_dma(priv, priv->tx_chan);
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bcm_enet_disable_dma(priv, priv->tx_chan);
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@@ -2757,6 +2793,9 @@ static int __devinit bcm_enetsw_probe(st
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memcpy(priv->used_ports, pd->used_ports,
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sizeof (pd->used_ports));
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priv->num_ports = pd->num_ports;
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+ priv->dma_chan_en_mask = pd->dma_chan_en_mask;
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+ priv->dma_chan_int_mask = pd->dma_chan_int_mask;
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+ priv->dma_chan_width = pd->dma_chan_width;
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}
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ret = compute_hw_mtu(priv, dev->mtu);
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--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
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--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
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+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
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+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
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@@ -367,6 +367,21 @@ struct bcm_enet_priv {
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@@ -367,6 +367,21 @@ struct bcm_enet_priv {
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@ -689,7 +710,23 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org> |
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};
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};
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/*
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/*
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@@ -72,4 +89,66 @@ int __init bcm63xx_enet_register(int uni
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@@ -64,6 +81,15 @@ struct bcm63xx_enetsw_platform_data {
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char mac_addr[ETH_ALEN];
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int num_ports;
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struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
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+
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+ /* DMA channel enable mask */
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+ u32 dma_chan_en_mask;
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+
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+ /* DMA channel interrupt mask */
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+ u32 dma_chan_int_mask;
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+
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+ /* DMA channel register width */
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+ unsigned int dma_chan_width;
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};
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int __init bcm63xx_enet_register(int unit,
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@@ -72,4 +98,66 @@ int __init bcm63xx_enet_register(int uni
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int __init
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int __init
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bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd);
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bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd);
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