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4 Commits (e2bc6c8b273b9991d10ba7aa990537e4053e989c)

Author SHA1 Message Date
Anis Elleuch 1d4d7ff274 Add missing asm instruction to correct sha256 calculation in avx mode
10 years ago
Anis Elleuch e89271b8f5 Use Intel optimized code (ssse3, avx, avx2) to calculate sha256
10 years ago
Harshavardhana b1266de212 Consolidate asm.S from crc32c, sha1, sha256 and sha512
10 years ago
Harshavardhana 68de9ac19e Further restructure
10 years ago