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/*
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* Mini Object Storage, (C) 2014 Minio, Inc. |
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* |
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* Licensed under the Apache License, Version 2.0 (the "License"); |
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* you may not use this file except in compliance with the License. |
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* You may obtain a copy of the License at |
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* |
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* http://www.apache.org/licenses/LICENSE-2.0
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* |
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* Unless required by applicable law or agreed to in writing, software |
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* distributed under the License is distributed on an "AS IS" BASIS, |
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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* See the License for the specific language governing permissions and |
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* limitations under the License. |
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*/ |
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#include <stdio.h> |
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#include <stdlib.h> |
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static void cpuid(int cpuinfo[4] ,int infotype) { |
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__asm__ __volatile__ ( |
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"cpuid": |
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"=a" (cpuinfo[0]), |
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"=b" (cpuinfo[1]), |
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"=c" (cpuinfo[2]), |
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"=d" (cpuinfo[3]) : |
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"a" (infotype), "c" (0) |
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); |
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} |
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/*
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SSE41 : return true |
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no SSE41 : return false |
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*/ |
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int has_sse41 (void) { |
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int info[4]; |
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cpuid(info, 0x00000001); |
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return ((info[2] & ((int)1 << 19)) != 0); |
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} |
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/*
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AVX : return true |
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no AVX : return false |
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*/ |
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int has_avx (void) { |
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int info[4]; |
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cpuid(info, 0x00000001); |
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return ((info[2] & ((int)1 << 28)) != 0); |
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} |
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/*
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AVX2 : return true |
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no AVX2 : return false |
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*/ |
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int has_avx2 (void) { |
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int info[4]; |
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cpuid(info, 0x00000007); |
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return ((info[1] & ((int)1 << 5)) != 0); |
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} |
@ -1,138 +0,0 @@ |
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/* |
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* Mini Object Storage, (C) 2014 Minio, Inc. |
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* |
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* Licensed under the Apache License, Version 2.0 (the "License") ;
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* you may not use this file except in compliance with the License. |
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* You may obtain a copy of the License at |
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* |
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* http://www.apache.org/licenses/LICENSE-2.0 |
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* |
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* Unless required by applicable law or agreed to in writing, software |
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* distributed under the License is distributed on an "AS IS" BASIS, |
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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* See the License for the specific language governing permissions and |
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* limitations under the License. |
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*/ |
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#ifdef __APPLE__ |
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#define HAS_SSE _has_sse41 |
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#define HAS_AVX _has_avx |
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#define HAS_AVX2 _has_avx2 |
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#else |
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#define HAS_SSE has_sse41 |
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#define HAS_AVX has_avx |
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#define HAS_AVX2 has_avx2 |
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#endif |
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.file "cpufeatures.c" |
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.text |
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cpuid: |
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.LFB2: |
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.cfi_startproc |
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pushq %rbp |
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.cfi_def_cfa_offset 16
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.cfi_offset 6, -16 |
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movq %rsp, %rbp |
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.cfi_def_cfa_register 6
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pushq %rbx |
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.cfi_offset 3, -24 |
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movq %rdi, -16(%rbp) |
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movl %esi, -20(%rbp) |
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movq -16(%rbp), %rax |
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leaq 4(%rax), %r10 |
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movq -16(%rbp), %rax |
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leaq 8(%rax), %r9 |
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movq -16(%rbp), %rax |
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leaq 12(%rax), %r8 |
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movl -20(%rbp), %eax |
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movl $0, %edx |
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movl %edx, %ecx |
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#APP |
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# 21 "cpufeatures.c" 1 |
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cpuid |
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# 0 "" 2 |
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#NO_APP |
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movl %ebx, %esi |
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movl %eax, %edi |
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movq -16(%rbp), %rax |
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movl %edi, (%rax) |
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movl %esi, (%r10) |
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movl %ecx, (%r9) |
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movl %edx, (%r8) |
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popq %rbx |
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popq %rbp |
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.cfi_def_cfa 7, 8 |
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ret |
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.cfi_endproc |
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.LFE2: |
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.globl HAS_SSE
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HAS_SSE: |
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.LFB3: |
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.cfi_startproc |
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pushq %rbp |
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.cfi_def_cfa_offset 16
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.cfi_offset 6, -16 |
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movq %rsp, %rbp |
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.cfi_def_cfa_register 6
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subq $16, %rsp |
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leaq -16(%rbp), %rax |
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movl $1, %esi |
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movq %rax, %rdi |
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call cpuid |
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movl -8(%rbp), %eax |
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andl $524288, %eax |
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testl %eax, %eax |
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setne %al |
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movzbl %al, %eax |
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leave |
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.cfi_def_cfa 7, 8 |
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ret |
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.cfi_endproc |
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.LFE3: |
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.globl HAS_AVX
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HAS_AVX: |
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.LFB4: |
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.cfi_startproc |
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pushq %rbp |
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.cfi_def_cfa_offset 16
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.cfi_offset 6, -16 |
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movq %rsp, %rbp |
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.cfi_def_cfa_register 6
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subq $16, %rsp |
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leaq -16(%rbp), %rax |
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movl $1, %esi |
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movq %rax, %rdi |
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call cpuid |
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movl -8(%rbp), %eax |
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andl $268435456, %eax |
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testl %eax, %eax |
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setne %al |
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movzbl %al, %eax |
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leave |
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.cfi_def_cfa 7, 8 |
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ret |
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.cfi_endproc |
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.LFE4: |
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.globl HAS_AVX2
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HAS_AVX2: |
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.LFB5: |
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.cfi_startproc |
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pushq %rbp |
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.cfi_def_cfa_offset 16
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.cfi_offset 6, -16 |
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movq %rsp, %rbp |
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.cfi_def_cfa_register 6
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subq $16, %rsp |
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leaq -16(%rbp), %rax |
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movl $7, %esi |
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movq %rax, %rdi |
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call cpuid |
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movl -12(%rbp), %eax |
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andl $32, %eax |
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testl %eax, %eax |
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setne %al |
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movzbl %al, %eax |
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leave |
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.cfi_def_cfa 7, 8 |
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ret |
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.cfi_endproc |
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