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161 lines
6.4 KiB
161 lines
6.4 KiB
From 1cb94db3d1bfe0075bde78fb2989f17e0a8a3936 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Wed, 17 Aug 2016 23:00:30 +0200
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Subject: [PATCH] net: bgmac: support Ethernet core on BCM53573 SoCs
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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BCM53573 is a new series of Broadcom's SoCs. It's based on ARM and can
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be found in two packages (versions): BCM53573 and BCM47189. It shares
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some code with the Northstar family, but also requires some new quirks.
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First of all there can be up to 2 Ethernet cores on this SoC. If that is
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the case, they are connected to two different switch ports allowing some
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more complex/optimized setups. It seems the second unit doesn't come
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fully configured and requires some IRQ quirk.
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Other than that only the first core is connected to the PHY. For the
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second one we have to register fixed PHY (similarly to the Northstar),
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otherwise generic PHY driver would get some invalid info.
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This has been successfully tested on Tenda AC9 (BCM47189B0).
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/ethernet/broadcom/bgmac-bcma.c | 19 ++++++++++++++++++-
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drivers/net/ethernet/broadcom/bgmac.c | 25 +++++++++++++++++++++++++
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drivers/net/ethernet/broadcom/bgmac.h | 19 +++++++++++++++++++
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include/linux/bcma/bcma.h | 3 +++
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include/linux/bcma/bcma_regs.h | 1 +
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5 files changed, 66 insertions(+), 1 deletion(-)
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--- a/drivers/net/ethernet/broadcom/bgmac-bcma.c
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+++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c
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@@ -92,6 +92,7 @@ MODULE_DEVICE_TABLE(bcma, bgmac_bcma_tbl
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/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipattach */
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static int bgmac_probe(struct bcma_device *core)
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{
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+ struct bcma_chipinfo *ci = &core->bus->chipinfo;
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struct ssb_sprom *sprom = &core->bus->sprom;
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struct mii_bus *mii_bus;
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struct bgmac *bgmac;
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@@ -157,7 +158,8 @@ static int bgmac_probe(struct bcma_devic
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dev_info(bgmac->dev, "Found PHY addr: %d%s\n", bgmac->phyaddr,
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bgmac->phyaddr == BGMAC_PHY_NOREGS ? " (NOREGS)" : "");
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- if (!bgmac_is_bcm4707_family(core)) {
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+ if (!bgmac_is_bcm4707_family(core) &&
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+ !(ci->id == BCMA_CHIP_ID_BCM53573 && core->core_unit == 1)) {
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mii_bus = bcma_mdio_mii_register(core, bgmac->phyaddr);
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if (IS_ERR(mii_bus)) {
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err = PTR_ERR(mii_bus);
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@@ -230,6 +232,21 @@ static int bgmac_probe(struct bcma_devic
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bgmac->feature_flags |= BGMAC_FEAT_NO_RESET;
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bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500;
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break;
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+ case BCMA_CHIP_ID_BCM53573:
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+ bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
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+ bgmac->feature_flags |= BGMAC_FEAT_SET_RXQ_CLK;
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+ if (ci->pkg == BCMA_PKG_ID_BCM47189)
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+ bgmac->feature_flags |= BGMAC_FEAT_IOST_ATTACHED;
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+ if (core->core_unit == 0) {
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+ bgmac->feature_flags |= BGMAC_FEAT_CC4_IF_SW_TYPE;
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+ if (ci->pkg == BCMA_PKG_ID_BCM47189)
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+ bgmac->feature_flags |=
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+ BGMAC_FEAT_CC4_IF_SW_TYPE_RGMII;
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+ } else if (core->core_unit == 1) {
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+ bgmac->feature_flags |= BGMAC_FEAT_IRQ_ID_OOB_6;
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+ bgmac->feature_flags |= BGMAC_FEAT_CC7_IF_TYPE_RGMII;
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+ }
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+ break;
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default:
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bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
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bgmac->feature_flags |= BGMAC_FEAT_SET_RXQ_CLK;
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--- a/drivers/net/ethernet/broadcom/bgmac.c
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+++ b/drivers/net/ethernet/broadcom/bgmac.c
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@@ -943,6 +943,27 @@ static void bgmac_chip_reset(struct bgma
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bgmac_cco_ctl_maskset(bgmac, 1, ~(BGMAC_CHIPCTL_1_IF_TYPE_MASK |
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BGMAC_CHIPCTL_1_SW_TYPE_MASK),
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sw_type);
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+ } else if (bgmac->feature_flags & BGMAC_FEAT_CC4_IF_SW_TYPE) {
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+ u32 sw_type = BGMAC_CHIPCTL_4_IF_TYPE_MII |
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+ BGMAC_CHIPCTL_4_SW_TYPE_EPHY;
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+ u8 et_swtype = 0;
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+ char buf[4];
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+
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+ if (bcm47xx_nvram_getenv("et_swtype", buf, sizeof(buf)) > 0) {
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+ if (kstrtou8(buf, 0, &et_swtype))
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+ dev_err(bgmac->dev, "Failed to parse et_swtype (%s)\n",
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+ buf);
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+ sw_type = (et_swtype & 0x0f) << 12;
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+ } else if (bgmac->feature_flags & BGMAC_FEAT_CC4_IF_SW_TYPE_RGMII) {
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+ sw_type = BGMAC_CHIPCTL_4_IF_TYPE_RGMII |
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+ BGMAC_CHIPCTL_4_SW_TYPE_RGMII;
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+ }
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+ bgmac_cco_ctl_maskset(bgmac, 4, ~(BGMAC_CHIPCTL_4_IF_TYPE_MASK |
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+ BGMAC_CHIPCTL_4_SW_TYPE_MASK),
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+ sw_type);
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+ } else if (bgmac->feature_flags & BGMAC_FEAT_CC7_IF_TYPE_RGMII) {
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+ bgmac_cco_ctl_maskset(bgmac, 7, ~BGMAC_CHIPCTL_7_IF_TYPE_MASK,
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+ BGMAC_CHIPCTL_7_IF_TYPE_RGMII);
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}
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if (iost & BGMAC_BCMA_IOST_ATTACHED && !bgmac->has_robosw)
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@@ -1486,6 +1507,10 @@ int bgmac_enet_probe(struct bgmac *info)
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*/
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bgmac_clk_enable(bgmac, 0);
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+ /* This seems to be fixing IRQ by assigning OOB #6 to the core */
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+ if (bgmac->feature_flags & BGMAC_FEAT_IRQ_ID_OOB_6)
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+ bgmac_idm_write(bgmac, BCMA_OOB_SEL_OUT_A30, 0x86);
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+
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bgmac_chip_reset(bgmac);
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err = bgmac_dma_alloc(bgmac);
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--- a/drivers/net/ethernet/broadcom/bgmac.h
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+++ b/drivers/net/ethernet/broadcom/bgmac.h
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@@ -369,6 +369,21 @@
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#define BGMAC_CHIPCTL_1_SW_TYPE_RGMII 0x000000C0
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#define BGMAC_CHIPCTL_1_RXC_DLL_BYPASS 0x00010000
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+#define BGMAC_CHIPCTL_4_IF_TYPE_MASK 0x00003000
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+#define BGMAC_CHIPCTL_4_IF_TYPE_RMII 0x00000000
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+#define BGMAC_CHIPCTL_4_IF_TYPE_MII 0x00001000
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+#define BGMAC_CHIPCTL_4_IF_TYPE_RGMII 0x00002000
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+#define BGMAC_CHIPCTL_4_SW_TYPE_MASK 0x0000C000
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+#define BGMAC_CHIPCTL_4_SW_TYPE_EPHY 0x00000000
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+#define BGMAC_CHIPCTL_4_SW_TYPE_EPHYMII 0x00004000
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+#define BGMAC_CHIPCTL_4_SW_TYPE_EPHYRMII 0x00008000
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+#define BGMAC_CHIPCTL_4_SW_TYPE_RGMII 0x0000C000
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+
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+#define BGMAC_CHIPCTL_7_IF_TYPE_MASK 0x000000C0
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+#define BGMAC_CHIPCTL_7_IF_TYPE_RMII 0x00000000
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+#define BGMAC_CHIPCTL_7_IF_TYPE_MII 0x00000040
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+#define BGMAC_CHIPCTL_7_IF_TYPE_RGMII 0x00000080
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+
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#define BGMAC_WEIGHT 64
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#define ETHER_MAX_LEN 1518
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@@ -390,6 +405,10 @@
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#define BGMAC_FEAT_NO_CLR_MIB BIT(13)
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#define BGMAC_FEAT_FORCE_SPEED_2500 BIT(14)
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#define BGMAC_FEAT_CMDCFG_SR_REV4 BIT(15)
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+#define BGMAC_FEAT_IRQ_ID_OOB_6 BIT(16)
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+#define BGMAC_FEAT_CC4_IF_SW_TYPE BIT(17)
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+#define BGMAC_FEAT_CC4_IF_SW_TYPE_RGMII BIT(18)
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+#define BGMAC_FEAT_CC7_IF_TYPE_RGMII BIT(19)
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struct bgmac_slot_info {
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union {
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--- a/include/linux/bcma/bcma_regs.h
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+++ b/include/linux/bcma/bcma_regs.h
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@@ -23,6 +23,7 @@
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#define BCMA_CLKCTLST_4328A0_HAVEALP 0x00020000 /* 4328a0 has reversed bits */
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/* Agent registers (common for every core) */
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+#define BCMA_OOB_SEL_OUT_A30 0x0100
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#define BCMA_IOCTL 0x0408 /* IO control */
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#define BCMA_IOCTL_CLK 0x0001
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#define BCMA_IOCTL_FGC 0x0002
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