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308 lines
8.6 KiB
308 lines
8.6 KiB
From 03855caf93f7332a3f320228ba1a0e7baae8a749 Mon Sep 17 00:00:00 2001
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From: Tim Harvey <tharvey@gateworks.com>
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Date: Thu, 15 May 2014 12:36:23 -0700
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Subject: [PATCH] net: igb: register mii_bus for SerDes w/ external phy
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If an i210 is configured for 1000BASE-BX link_mode and has an external phy
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specified, then register an mii bus using the external phy address as
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a mask.
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An i210 hooked to an external standard phy will be configured with a link_mo
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of SGMII in which case phy ops will be configured and used internall in the
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igb driver for link status. However, in certain cases one might be using a
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backplane SerDes connection to something that talks on the mdio bus but is
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not a standard phy, such as a switch. In this case by registering an mdio
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bus a phy driver can manage the device.
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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---
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drivers/net/ethernet/intel/igb/e1000_82575.c | 15 +++
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drivers/net/ethernet/intel/igb/e1000_hw.h | 7 ++
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drivers/net/ethernet/intel/igb/igb_main.c | 168 ++++++++++++++++++++++++++-
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3 files changed, 185 insertions(+), 5 deletions(-)
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--- a/drivers/net/ethernet/intel/igb/e1000_82575.c
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+++ b/drivers/net/ethernet/intel/igb/e1000_82575.c
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@@ -613,13 +613,25 @@ static s32 igb_get_invariants_82575(stru
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switch (link_mode) {
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case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX:
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hw->phy.media_type = e1000_media_type_internal_serdes;
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+ if (igb_sgmii_uses_mdio_82575(hw)) {
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+ u32 mdicnfg = rd32(E1000_MDICNFG);
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+ mdicnfg &= E1000_MDICNFG_PHY_MASK;
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+ hw->phy.addr = mdicnfg >> E1000_MDICNFG_PHY_SHIFT;
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+ hw_dbg("1000BASE_KX w/ external MDIO device at 0x%x\n",
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+ hw->phy.addr);
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+ } else {
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+ hw_dbg("1000BASE_KX");
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+ }
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break;
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case E1000_CTRL_EXT_LINK_MODE_SGMII:
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/* Get phy control interface type set (MDIO vs. I2C)*/
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if (igb_sgmii_uses_mdio_82575(hw)) {
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hw->phy.media_type = e1000_media_type_copper;
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dev_spec->sgmii_active = true;
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+ hw_dbg("SGMII with external MDIO PHY");
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break;
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+ } else {
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+ hw_dbg("SGMII with external I2C PHY");
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}
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/* fall through for I2C based SGMII */
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case E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES:
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@@ -636,8 +648,11 @@ static s32 igb_get_invariants_82575(stru
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hw->phy.media_type = e1000_media_type_copper;
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dev_spec->sgmii_active = true;
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}
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+ hw_dbg("SERDES with external SFP");
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break;
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+ } else {
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+ hw_dbg("SERDES");
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}
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/* do not change link mode for 100BaseFX */
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--- a/drivers/net/ethernet/intel/igb/e1000_hw.h
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+++ b/drivers/net/ethernet/intel/igb/e1000_hw.h
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@@ -27,6 +27,7 @@
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/netdevice.h>
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+#include <linux/phy.h>
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#include "e1000_regs.h"
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#include "e1000_defines.h"
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@@ -543,6 +544,12 @@ struct e1000_hw {
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struct e1000_mbx_info mbx;
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struct e1000_host_mng_dhcp_cookie mng_cookie;
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+#ifdef CONFIG_PHYLIB
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+ /* Phylib and MDIO interface */
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+ struct mii_bus *mii_bus;
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+ struct phy_device *phy_dev;
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+ phy_interface_t phy_interface;
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+#endif
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union {
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struct e1000_dev_spec_82575 _82575;
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} dev_spec;
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--- a/drivers/net/ethernet/intel/igb/igb_main.c
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+++ b/drivers/net/ethernet/intel/igb/igb_main.c
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@@ -41,6 +41,7 @@
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#include <linux/if_vlan.h>
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#include <linux/pci.h>
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#include <linux/pci-aspm.h>
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+#include <linux/phy.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/ip.h>
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@@ -2217,6 +2218,126 @@ static s32 igb_init_i2c(struct igb_adapt
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return status;
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}
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+
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+#ifdef CONFIG_PHYLIB
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+/*
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+ * MMIO/PHYdev support
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+ */
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+
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+static int igb_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
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+{
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+ struct e1000_hw *hw = bus->priv;
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+ u16 out;
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+ int err;
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+
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+ err = igb_read_reg_gs40g(hw, mii_id, regnum, &out);
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+ if (err)
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+ return err;
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+ return out;
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+}
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+
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+static int igb_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
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+ u16 val)
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+{
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+ struct e1000_hw *hw = bus->priv;
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+
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+ return igb_write_reg_gs40g(hw, mii_id, regnum, val);
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+}
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+
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+static int igb_enet_mdio_reset(struct mii_bus *bus)
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+{
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+ udelay(300);
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+ return 0;
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+}
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+
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+static void igb_enet_mii_link(struct net_device *netdev)
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+{
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+}
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+
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+/* Probe the mdio bus for phys and connect them */
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+static int igb_enet_mii_probe(struct net_device *netdev)
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+{
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+ struct igb_adapter *adapter = netdev_priv(netdev);
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+ struct e1000_hw *hw = &adapter->hw;
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+ struct phy_device *phy_dev = NULL;
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+ int phy_id;
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+
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+ /* check for attached phy */
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+ for (phy_id = 0; (phy_id < PHY_MAX_ADDR); phy_id++) {
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+ if (hw->mii_bus->phy_map[phy_id]) {
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+ phy_dev = hw->mii_bus->phy_map[phy_id];
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+ break;
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+ }
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+ }
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+ if (!phy_dev) {
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+ netdev_err(netdev, "no PHY found\n");
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+ return -ENODEV;
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+ }
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+
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+ hw->phy_interface = PHY_INTERFACE_MODE_RGMII;
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+ phy_dev = phy_connect(netdev, dev_name(&phy_dev->dev),
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+ igb_enet_mii_link, hw->phy_interface);
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+ if (IS_ERR(phy_dev)) {
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+ netdev_err(netdev, "could not attach to PHY\n");
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+ return PTR_ERR(phy_dev);
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+ }
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+
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+ hw->phy_dev = phy_dev;
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+ netdev_info(netdev, "igb PHY driver [%s] (mii_bus:phy_addr=%s)\n",
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+ hw->phy_dev->drv->name, dev_name(&hw->phy_dev->dev));
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+
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+ return 0;
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+}
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+
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+/* Create and register mdio bus */
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+static int igb_enet_mii_init(struct pci_dev *pdev)
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+{
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+ struct mii_bus *mii_bus;
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+ struct net_device *netdev = pci_get_drvdata(pdev);
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+ struct igb_adapter *adapter = netdev_priv(netdev);
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+ struct e1000_hw *hw = &adapter->hw;
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+ int err;
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+
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+ mii_bus = mdiobus_alloc();
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+ if (mii_bus == NULL) {
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+ err = -ENOMEM;
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+ goto err_out;
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+ }
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+
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+ mii_bus->name = "igb_enet_mii_bus";
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+ mii_bus->read = igb_enet_mdio_read;
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+ mii_bus->write = igb_enet_mdio_write;
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+ mii_bus->reset = igb_enet_mdio_reset;
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+ snprintf(mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
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+ pci_name(pdev), hw->device_id + 1);
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+ mii_bus->priv = hw;
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+ mii_bus->parent = &pdev->dev;
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+ mii_bus->phy_mask = ~(1 << hw->phy.addr);
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+
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+ err = mdiobus_register(mii_bus);
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+ if (err) {
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+ printk(KERN_ERR "failed to register mii_bus: %d\n", err);
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+ goto err_out_free_mdiobus;
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+ }
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+ hw->mii_bus = mii_bus;
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+
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+ return 0;
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+
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+err_out_free_mdiobus:
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+ mdiobus_free(mii_bus);
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+err_out:
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+ return err;
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+}
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+
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+static void igb_enet_mii_remove(struct e1000_hw *hw)
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+{
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+ if (hw->mii_bus) {
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+ mdiobus_unregister(hw->mii_bus);
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+ mdiobus_free(hw->mii_bus);
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+ }
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+}
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+#endif /* CONFIG_PHYLIB */
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+
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/**
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* igb_probe - Device Initialization Routine
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* @pdev: PCI device information struct
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@@ -2641,6 +2762,13 @@ static int igb_probe(struct pci_dev *pde
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}
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}
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pm_runtime_put_noidle(&pdev->dev);
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+
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+#ifdef CONFIG_PHYLIB
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+ /* create and register the mdio bus if using ext phy */
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+ if (rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO)
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+ igb_enet_mii_init(pdev);
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+#endif
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+
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return 0;
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err_register:
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@@ -2788,6 +2916,10 @@ static void igb_remove(struct pci_dev *p
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struct e1000_hw *hw = &adapter->hw;
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pm_runtime_get_noresume(&pdev->dev);
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+#ifdef CONFIG_PHYLIB
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+ if (rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO)
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+ igb_enet_mii_remove(hw);
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+#endif
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#ifdef CONFIG_IGB_HWMON
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igb_sysfs_exit(adapter);
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#endif
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@@ -3111,6 +3243,12 @@ static int __igb_open(struct net_device
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if (!resuming)
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pm_runtime_put(&pdev->dev);
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+#ifdef CONFIG_PHYLIB
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+ /* Probe and connect to PHY if using ext phy */
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+ if (rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO)
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+ igb_enet_mii_probe(netdev);
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+#endif
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+
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/* start the watchdog. */
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hw->mac.get_link_status = 1;
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schedule_work(&adapter->watchdog_task);
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@@ -7102,21 +7240,41 @@ void igb_alloc_rx_buffers(struct igb_rin
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static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
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{
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struct igb_adapter *adapter = netdev_priv(netdev);
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+ struct e1000_hw *hw = &adapter->hw;
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struct mii_ioctl_data *data = if_mii(ifr);
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- if (adapter->hw.phy.media_type != e1000_media_type_copper)
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+ if (adapter->hw.phy.media_type != e1000_media_type_copper &&
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+ !(rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO))
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return -EOPNOTSUPP;
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switch (cmd) {
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case SIOCGMIIPHY:
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- data->phy_id = adapter->hw.phy.addr;
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+ data->phy_id = hw->phy.addr;
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break;
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case SIOCGMIIREG:
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- if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
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- &data->val_out))
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- return -EIO;
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+ if (hw->mac.type == e1000_i210 || hw->mac.type == e1000_i211) {
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+ if (igb_read_reg_gs40g(&adapter->hw, data->phy_id,
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+ data->reg_num & 0x1F,
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+ &data->val_out))
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+ return -EIO;
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+ } else {
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+ if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
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+ &data->val_out))
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+ return -EIO;
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+ }
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break;
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case SIOCSMIIREG:
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+ if (hw->mac.type == e1000_i210 || hw->mac.type == e1000_i211) {
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+ if (igb_write_reg_gs40g(hw, data->phy_id,
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+ data->reg_num & 0x1F,
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+ data->val_in))
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+ return -EIO;
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+ } else {
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+ if (igb_write_phy_reg(hw, data->reg_num & 0x1F,
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+ data->val_in))
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+ return -EIO;
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+ }
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+ break;
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default:
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return -EOPNOTSUPP;
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}
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