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304 lines
9.4 KiB
304 lines
9.4 KiB
From 6f7a129e59721f6d97a0f06f7078d06f19ade69e Mon Sep 17 00:00:00 2001
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From: Yutang Jiang <yutang.jiang@nxp.com>
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Date: Thu, 21 Jul 2016 19:37:42 +0800
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Subject: [PATCH 70/70] Revert "arm64: use fixmap region for permanent FDT
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mapping"
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Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
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---
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Documentation/arm64/booting.txt | 10 +++----
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arch/arm64/include/asm/boot.h | 14 ----------
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arch/arm64/include/asm/fixmap.h | 15 -----------
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arch/arm64/include/asm/mmu.h | 1 -
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arch/arm64/kernel/head.S | 39 ++++++++++++++++++++++++++-
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arch/arm64/kernel/setup.c | 29 +++++++++++++-------
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arch/arm64/mm/init.c | 1 +
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arch/arm64/mm/mmu.c | 57 ---------------------------------------
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8 files changed, 62 insertions(+), 104 deletions(-)
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delete mode 100644 arch/arm64/include/asm/boot.h
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--- a/Documentation/arm64/booting.txt
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+++ b/Documentation/arm64/booting.txt
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@@ -45,13 +45,11 @@ sees fit.)
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Requirement: MANDATORY
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-The device tree blob (dtb) must be placed on an 8-byte boundary and must
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-not exceed 2 megabytes in size. Since the dtb will be mapped cacheable
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-using blocks of up to 2 megabytes in size, it must not be placed within
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-any 2M region which must be mapped with any specific attributes.
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+The device tree blob (dtb) must be placed on an 8-byte boundary within
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+the first 512 megabytes from the start of the kernel image and must not
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+cross a 2-megabyte boundary. This is to allow the kernel to map the
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+blob using a single section mapping in the initial page tables.
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-NOTE: versions prior to v4.2 also require that the DTB be placed within
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-the 512 MB region starting at text_offset bytes below the kernel Image.
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3. Decompress the kernel image
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------------------------------
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--- a/arch/arm64/include/asm/boot.h
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+++ /dev/null
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@@ -1,14 +0,0 @@
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-
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-#ifndef __ASM_BOOT_H
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-#define __ASM_BOOT_H
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-
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-#include <asm/sizes.h>
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-
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-/*
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- * arm64 requires the DTB to be 8 byte aligned and
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- * not exceed 2MB in size.
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- */
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-#define MIN_FDT_ALIGN 8
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-#define MAX_FDT_SIZE SZ_2M
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-
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-#endif
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--- a/arch/arm64/include/asm/fixmap.h
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+++ b/arch/arm64/include/asm/fixmap.h
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@@ -18,7 +18,6 @@
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#ifndef __ASSEMBLY__
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#include <linux/kernel.h>
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#include <linux/sizes.h>
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-#include <asm/boot.h>
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#include <asm/page.h>
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/*
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@@ -34,20 +33,6 @@
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*/
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enum fixed_addresses {
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FIX_HOLE,
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-
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- /*
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- * Reserve a virtual window for the FDT that is 2 MB larger than the
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- * maximum supported size, and put it at the top of the fixmap region.
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- * The additional space ensures that any FDT that does not exceed
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- * MAX_FDT_SIZE can be mapped regardless of whether it crosses any
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- * 2 MB alignment boundaries.
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- *
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- * Keep this at the top so it remains 2 MB aligned.
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- */
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-#define FIX_FDT_SIZE (MAX_FDT_SIZE + SZ_2M)
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- FIX_FDT_END,
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- FIX_FDT = FIX_FDT_END + FIX_FDT_SIZE / PAGE_SIZE - 1,
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-
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FIX_EARLYCON_MEM_BASE,
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FIX_TEXT_POKE0,
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__end_of_permanent_fixed_addresses,
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--- a/arch/arm64/include/asm/mmu.h
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+++ b/arch/arm64/include/asm/mmu.h
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@@ -34,6 +34,5 @@ extern void init_mem_pgprot(void);
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extern void create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
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unsigned long virt, phys_addr_t size,
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pgprot_t prot);
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-extern void *fixmap_remap_fdt(phys_addr_t dt_phys);
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#endif
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--- a/arch/arm64/kernel/head.S
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+++ b/arch/arm64/kernel/head.S
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@@ -212,6 +212,8 @@ ENTRY(stext)
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bl el2_setup // Drop to EL1, w20=cpu_boot_mode
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adrp x24, __PHYS_OFFSET
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bl set_cpu_boot_mode_flag
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+
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+ bl __vet_fdt
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bl __create_page_tables // x25=TTBR0, x26=TTBR1
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/*
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* The following calls CPU setup code, see arch/arm64/mm/proc.S for
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@@ -243,6 +245,24 @@ preserve_boot_args:
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ENDPROC(preserve_boot_args)
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/*
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+ * Determine validity of the x21 FDT pointer.
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+ * The dtb must be 8-byte aligned and live in the first 512M of memory.
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+ */
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+__vet_fdt:
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+ tst x21, #0x7
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+ b.ne 1f
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+ cmp x21, x24
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+ b.lt 1f
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+ mov x0, #(1 << 29)
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+ add x0, x0, x24
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+ cmp x21, x0
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+ b.ge 1f
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+ ret
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+1:
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+ mov x21, #0
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+ ret
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+ENDPROC(__vet_fdt)
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+/*
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* Macro to create a table entry to the next page.
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*
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* tbl: page table address
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@@ -306,7 +326,8 @@ ENDPROC(preserve_boot_args)
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* required to get the kernel running. The following sections are required:
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* - identity mapping to enable the MMU (low address, TTBR0)
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* - first few MB of the kernel linear mapping to jump to once the MMU has
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- * been enabled
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+ * been enabled, including the FDT blob (TTBR1)
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+ * - pgd entry for fixed mappings (TTBR1)
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*/
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__create_page_tables:
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adrp x25, idmap_pg_dir
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@@ -396,6 +417,22 @@ __create_page_tables:
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create_block_map x0, x7, x3, x5, x6
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/*
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+ * Map the FDT blob (maximum 2MB; must be within 512MB of
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+ * PHYS_OFFSET).
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+ */
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+ mov x3, x21 // FDT phys address
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+ and x3, x3, #~((1 << 21) - 1) // 2MB aligned
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+ mov x6, #PAGE_OFFSET
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+ sub x5, x3, x24 // subtract PHYS_OFFSET
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+ tst x5, #~((1 << 29) - 1) // within 512MB?
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+ csel x21, xzr, x21, ne // zero the FDT pointer
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+ b.ne 1f
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+ add x5, x5, x6 // __va(FDT blob)
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+ add x6, x5, #1 << 21 // 2MB for the FDT blob
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+ sub x6, x6, #1 // inclusive range
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+ create_block_map x0, x7, x3, x5, x6
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+1:
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+ /*
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* Since the page tables have been populated with non-cacheable
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* accesses (MMU disabled), invalidate the idmap and swapper page
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* tables again to remove any speculatively loaded cache lines.
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--- a/arch/arm64/kernel/setup.c
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+++ b/arch/arm64/kernel/setup.c
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@@ -87,6 +87,18 @@ static struct resource mem_res[] = {
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#define kernel_code mem_res[0]
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#define kernel_data mem_res[1]
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+void __init early_print(const char *str, ...)
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+{
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+ char buf[256];
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+ va_list ap;
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+
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+ va_start(ap, str);
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+ vsnprintf(buf, sizeof(buf), str, ap);
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+ va_end(ap);
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+
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+ printk("%s", buf);
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+}
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+
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/*
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* The recorded values of x0 .. x3 upon kernel entry.
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*/
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@@ -180,14 +192,12 @@ static void __init smp_build_mpidr_hash(
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static void __init setup_machine_fdt(phys_addr_t dt_phys)
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{
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- void *dt_virt = fixmap_remap_fdt(dt_phys);
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-
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- if (!dt_virt || !early_init_dt_scan(dt_virt)) {
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- pr_crit("\n"
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- "Error: invalid device tree blob at physical address %pa (virtual address 0x%p)\n"
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- "The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"
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- "\nPlease check your bootloader.",
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- &dt_phys, dt_virt);
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+ if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys))) {
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+ early_print("\n"
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+ "Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n"
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+ "The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"
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+ "\nPlease check your bootloader.\n",
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+ dt_phys, phys_to_virt(dt_phys));
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while (true)
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cpu_relax();
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@@ -294,6 +304,7 @@ void __init setup_arch(char **cmdline_p)
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pr_info("Boot CPU: AArch64 Processor [%08x]\n", read_cpuid_id());
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sprintf(init_utsname()->machine, ELF_PLATFORM);
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+ setup_machine_fdt(__fdt_pointer);
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init_mm.start_code = (unsigned long) _text;
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init_mm.end_code = (unsigned long) _etext;
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init_mm.end_data = (unsigned long) _edata;
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@@ -304,8 +315,6 @@ void __init setup_arch(char **cmdline_p)
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early_fixmap_init();
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early_ioremap_init();
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- setup_machine_fdt(__fdt_pointer);
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-
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parse_early_param();
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/*
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--- a/arch/arm64/mm/init.c
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+++ b/arch/arm64/mm/init.c
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@@ -171,6 +171,7 @@ void __init arm64_memblock_init(void)
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memblock_reserve(__virt_to_phys(initrd_start), initrd_end - initrd_start);
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#endif
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+ early_init_fdt_reserve_self();
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early_init_fdt_scan_reserved_mem();
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/* 4GB maximum for 32-bit only capable devices */
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--- a/arch/arm64/mm/mmu.c
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+++ b/arch/arm64/mm/mmu.c
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@@ -21,7 +21,6 @@
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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-#include <linux/libfdt.h>
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#include <linux/mman.h>
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#include <linux/nodemask.h>
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#include <linux/memblock.h>
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@@ -641,59 +640,3 @@ void __set_fixmap(enum fixed_addresses i
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flush_tlb_kernel_range(addr, addr+PAGE_SIZE);
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}
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}
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-
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-void *__init fixmap_remap_fdt(phys_addr_t dt_phys)
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-{
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- const u64 dt_virt_base = __fix_to_virt(FIX_FDT);
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- pgprot_t prot = PAGE_KERNEL_RO;
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- int size, offset;
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- void *dt_virt;
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-
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- /*
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- * Check whether the physical FDT address is set and meets the minimum
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- * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be
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- * at least 8 bytes so that we can always access the magic and size
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- * fields of the FDT header after mapping the first chunk, double check
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- * here if that is indeed the case.
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- */
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- BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
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- if (!dt_phys || dt_phys % MIN_FDT_ALIGN)
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- return NULL;
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-
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- /*
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- * Make sure that the FDT region can be mapped without the need to
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- * allocate additional translation table pages, so that it is safe
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- * to call create_mapping() this early.
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- *
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- * On 64k pages, the FDT will be mapped using PTEs, so we need to
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- * be in the same PMD as the rest of the fixmap.
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- * On 4k pages, we'll use section mappings for the FDT so we only
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- * have to be in the same PUD.
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- */
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- BUILD_BUG_ON(dt_virt_base % SZ_2M);
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-
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- BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT !=
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- __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT);
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-
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- offset = dt_phys % SWAPPER_BLOCK_SIZE;
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- dt_virt = (void *)dt_virt_base + offset;
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-
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- /* map the first chunk so we can read the size from the header */
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- create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base,
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- SWAPPER_BLOCK_SIZE, prot);
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-
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- if (fdt_magic(dt_virt) != FDT_MAGIC)
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- return NULL;
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-
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- size = fdt_totalsize(dt_virt);
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- if (size > MAX_FDT_SIZE)
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- return NULL;
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-
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- if (offset + size > SWAPPER_BLOCK_SIZE)
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- create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base,
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- round_up(offset + size, SWAPPER_BLOCK_SIZE), prot);
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-
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- memblock_reserve(dt_phys, size);
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-
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- return dt_virt;
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-}
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