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184 lines
4.4 KiB
184 lines
4.4 KiB
From 94f442886711c6c4f4383a1c5a6994a788ba05d8 Mon Sep 17 00:00:00 2001
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From: Corentin Labbe <clabbe.montjoie@gmail.com>
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Date: Tue, 31 Oct 2017 09:19:13 +0100
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Subject: [PATCH] arm64: dts: allwinner: A64: Restore EMAC changes
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The original dwmac-sun8i DT bindings have some issue on how to handle
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integrated PHY and was reverted in last RC of 4.13.
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But now we have a solution so we need to get back that was reverted.
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This patch restore arm64 DT about dwmac-sun8i for A64
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This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")
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Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
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Acked-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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.../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16 ++++++++++++++++
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.../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 15 +++++++++++++++
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arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 +++++++++++++++++
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.../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 16 ++++++++++++++++
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arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 20 ++++++++++++++++++++
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5 files changed, 84 insertions(+)
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
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@@ -51,6 +51,7 @@
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compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
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aliases {
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+ ethernet0 = &emac;
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serial0 = &uart0;
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serial1 = &uart1;
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};
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@@ -69,6 +70,14 @@
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status = "okay";
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};
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+&emac {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rgmii_pins>;
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+ phy-mode = "rgmii";
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+ phy-handle = <&ext_rgmii_phy>;
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+ status = "okay";
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+};
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+
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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@@ -79,6 +88,13 @@
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bias-pull-up;
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};
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+&mdio {
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+ ext_rgmii_phy: ethernet-phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <1>;
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+ };
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+};
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+
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>;
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
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@@ -48,3 +48,18 @@
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/* TODO: Camera, touchscreen, etc. */
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};
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+
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+&emac {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rgmii_pins>;
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+ phy-mode = "rgmii";
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+ phy-handle = <&ext_rgmii_phy>;
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+ status = "okay";
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+};
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+
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+&mdio {
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+ ext_rgmii_phy: ethernet-phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <1>;
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+ };
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+};
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
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@@ -51,6 +51,7 @@
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compatible = "pine64,pine64", "allwinner,sun50i-a64";
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aliases {
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+ ethernet0 = &emac;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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@@ -71,6 +72,15 @@
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status = "okay";
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};
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+&emac {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rmii_pins>;
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+ phy-mode = "rmii";
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+ phy-handle = <&ext_rmii_phy1>;
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+ status = "okay";
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+
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+};
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+
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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@@ -81,6 +91,13 @@
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bias-pull-up;
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};
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+&mdio {
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+ ext_rmii_phy1: ethernet-phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <1>;
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+ };
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+};
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+
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>;
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
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@@ -53,6 +53,7 @@
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"allwinner,sun50i-a64";
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aliases {
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+ ethernet0 = &emac;
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serial0 = &uart0;
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};
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@@ -76,6 +77,21 @@
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status = "okay";
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};
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+&emac {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rgmii_pins>;
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+ phy-mode = "rgmii";
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+ phy-handle = <&ext_rgmii_phy>;
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+ status = "okay";
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+};
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+
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+&mdio {
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+ ext_rgmii_phy: ethernet-phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <1>;
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+ };
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+};
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+
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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@@ -449,6 +449,26 @@
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#size-cells = <0>;
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};
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+ emac: ethernet@1c30000 {
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+ compatible = "allwinner,sun50i-a64-emac";
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+ syscon = <&syscon>;
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+ reg = <0x01c30000 0x10000>;
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+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "macirq";
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+ resets = <&ccu RST_BUS_EMAC>;
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+ reset-names = "stmmaceth";
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+ clocks = <&ccu CLK_BUS_EMAC>;
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+ clock-names = "stmmaceth";
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+ status = "disabled";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ mdio: mdio {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+ };
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+
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gic: interrupt-controller@1c81000 {
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compatible = "arm,gic-400";
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reg = <0x01c81000 0x1000>,
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