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506 lines
15 KiB
506 lines
15 KiB
From 634db83b82658f4641d8026e340c6027cf74a6bb Mon Sep 17 00:00:00 2001
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From: Corentin Labbe <clabbe.montjoie@gmail.com>
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Date: Tue, 24 Oct 2017 19:57:13 +0200
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Subject: [PATCH] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs
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The Allwinner H3 SoC have two distinct MDIO bus, only one could be
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active at the same time.
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The selection of the active MDIO bus are done via some bits in the EMAC
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register of the system controller.
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This patch implement this MDIO switch via a custom MDIO-mux.
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Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 +
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drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 353 ++++++++++++++--------
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2 files changed, 224 insertions(+), 130 deletions(-)
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--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
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+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
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@@ -159,6 +159,7 @@ config DWMAC_SUN8I
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tristate "Allwinner sun8i GMAC support"
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default ARCH_SUNXI
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depends on OF && (ARCH_SUNXI || COMPILE_TEST)
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+ select MDIO_BUS_MUX
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---help---
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Support for Allwinner H3 A83T A64 EMAC ethernet controllers.
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--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
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+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
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@@ -17,6 +17,7 @@
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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+#include <linux/mdio-mux.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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@@ -41,14 +42,14 @@
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* This value is used for disabling properly EMAC
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* and used as a good starting value in case of the
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* boot process(uboot) leave some stuff.
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- * @internal_phy: Does the MAC embed an internal PHY
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+ * @soc_has_internal_phy: Does the MAC embed an internal PHY
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* @support_mii: Does the MAC handle MII
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* @support_rmii: Does the MAC handle RMII
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* @support_rgmii: Does the MAC handle RGMII
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*/
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struct emac_variant {
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u32 default_syscon_value;
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- int internal_phy;
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+ bool soc_has_internal_phy;
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bool support_mii;
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bool support_rmii;
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bool support_rgmii;
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@@ -61,7 +62,8 @@ struct emac_variant {
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* @rst_ephy: reference to the optional EPHY reset for the internal PHY
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* @variant: reference to the current board variant
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* @regmap: regmap for using the syscon
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- * @use_internal_phy: Does the current PHY choice imply using the internal PHY
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+ * @internal_phy_powered: Does the internal PHY is enabled
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+ * @mux_handle: Internal pointer used by mdio-mux lib
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*/
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struct sunxi_priv_data {
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struct clk *tx_clk;
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@@ -70,12 +72,13 @@ struct sunxi_priv_data {
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struct reset_control *rst_ephy;
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const struct emac_variant *variant;
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struct regmap *regmap;
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- bool use_internal_phy;
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+ bool internal_phy_powered;
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+ void *mux_handle;
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};
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static const struct emac_variant emac_variant_h3 = {
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.default_syscon_value = 0x58000,
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- .internal_phy = PHY_INTERFACE_MODE_MII,
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+ .soc_has_internal_phy = true,
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.support_mii = true,
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.support_rmii = true,
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.support_rgmii = true
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@@ -83,20 +86,20 @@ static const struct emac_variant emac_va
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static const struct emac_variant emac_variant_v3s = {
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.default_syscon_value = 0x38000,
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- .internal_phy = PHY_INTERFACE_MODE_MII,
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+ .soc_has_internal_phy = true,
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.support_mii = true
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};
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static const struct emac_variant emac_variant_a83t = {
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.default_syscon_value = 0,
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- .internal_phy = 0,
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+ .soc_has_internal_phy = false,
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.support_mii = true,
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.support_rgmii = true
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};
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static const struct emac_variant emac_variant_a64 = {
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.default_syscon_value = 0,
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- .internal_phy = 0,
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+ .soc_has_internal_phy = false,
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.support_mii = true,
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.support_rmii = true,
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.support_rgmii = true
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@@ -195,6 +198,9 @@ static const struct emac_variant emac_va
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#define H3_EPHY_LED_POL BIT(17) /* 1: active low, 0: active high */
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#define H3_EPHY_SHUTDOWN BIT(16) /* 1: shutdown, 0: power up */
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#define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */
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+#define H3_EPHY_MUX_MASK (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)
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+#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID 1
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+#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID 2
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/* H3/A64 specific bits */
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#define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */
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@@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmm
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return 0;
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}
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+/* Search in mdio-mux node for internal PHY node and get its clk/reset */
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+static int get_ephy_nodes(struct stmmac_priv *priv)
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+{
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+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
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+ struct device_node *mdio_mux, *iphynode;
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+ struct device_node *mdio_internal;
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+ int ret;
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+
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+ mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux");
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+ if (!mdio_mux) {
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+ dev_err(priv->device, "Cannot get mdio-mux node\n");
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+ return -ENODEV;
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+ }
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+
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+ mdio_internal = of_find_compatible_node(mdio_mux, NULL,
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+ "allwinner,sun8i-h3-mdio-internal");
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+ if (!mdio_internal) {
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+ dev_err(priv->device, "Cannot get internal_mdio node\n");
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+ return -ENODEV;
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+ }
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+
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+ /* Seek for internal PHY */
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+ for_each_child_of_node(mdio_internal, iphynode) {
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+ gmac->ephy_clk = of_clk_get(iphynode, 0);
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+ if (IS_ERR(gmac->ephy_clk))
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+ continue;
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+ gmac->rst_ephy = of_reset_control_get_exclusive(iphynode, NULL);
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+ if (IS_ERR(gmac->rst_ephy)) {
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+ ret = PTR_ERR(gmac->rst_ephy);
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+ if (ret == -EPROBE_DEFER)
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+ return ret;
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+ continue;
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+ }
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+ dev_info(priv->device, "Found internal PHY node\n");
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+ return 0;
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+ }
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+ return -ENODEV;
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+}
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+
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+static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv)
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+{
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+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
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+ int ret;
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+
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+ if (gmac->internal_phy_powered) {
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+ dev_warn(priv->device, "Internal PHY already powered\n");
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+ return 0;
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+ }
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+
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+ dev_info(priv->device, "Powering internal PHY\n");
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+ ret = clk_prepare_enable(gmac->ephy_clk);
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+ if (ret) {
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+ dev_err(priv->device, "Cannot enable internal PHY\n");
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+ return ret;
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+ }
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+
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+ /* Make sure the EPHY is properly reseted, as U-Boot may leave
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+ * it at deasserted state, and thus it may fail to reset EMAC.
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+ */
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+ reset_control_assert(gmac->rst_ephy);
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+
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+ ret = reset_control_deassert(gmac->rst_ephy);
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+ if (ret) {
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+ dev_err(priv->device, "Cannot deassert internal phy\n");
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+ clk_disable_unprepare(gmac->ephy_clk);
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+ return ret;
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+ }
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+
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+ gmac->internal_phy_powered = true;
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+
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+ return 0;
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+}
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+
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+static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac)
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+{
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+ if (!gmac->internal_phy_powered)
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+ return 0;
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+
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+ clk_disable_unprepare(gmac->ephy_clk);
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+ reset_control_assert(gmac->rst_ephy);
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+ gmac->internal_phy_powered = false;
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+ return 0;
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+}
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+
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+/* MDIO multiplexing switch function
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+ * This function is called by the mdio-mux layer when it thinks the mdio bus
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+ * multiplexer needs to switch.
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+ * 'current_child' is the current value of the mux register
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+ * 'desired_child' is the value of the 'reg' property of the target child MDIO
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+ * node.
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+ * The first time this function is called, current_child == -1.
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+ * If current_child == desired_child, then the mux is already set to the
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+ * correct bus.
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+ */
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+static int mdio_mux_syscon_switch_fn(int current_child, int desired_child,
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+ void *data)
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+{
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+ struct stmmac_priv *priv = data;
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+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
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+ u32 reg, val;
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+ int ret = 0;
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+ bool need_power_ephy = false;
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+
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+ if (current_child ^ desired_child) {
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+ regmap_read(gmac->regmap, SYSCON_EMAC_REG, ®);
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+ switch (desired_child) {
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+ case DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID:
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+ dev_info(priv->device, "Switch mux to internal PHY");
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+ val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT;
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+
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+ need_power_ephy = true;
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+ break;
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+ case DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID:
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+ dev_info(priv->device, "Switch mux to external PHY");
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+ val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN;
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+ need_power_ephy = false;
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+ break;
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+ default:
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+ dev_err(priv->device, "Invalid child ID %x\n",
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+ desired_child);
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+ return -EINVAL;
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+ }
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+ regmap_write(gmac->regmap, SYSCON_EMAC_REG, val);
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+ if (need_power_ephy) {
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+ ret = sun8i_dwmac_power_internal_phy(priv);
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+ if (ret)
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+ return ret;
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+ } else {
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+ sun8i_dwmac_unpower_internal_phy(gmac);
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+ }
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+ /* After changing syscon value, the MAC need reset or it will
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+ * use the last value (and so the last PHY set).
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+ */
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+ ret = sun8i_dwmac_reset(priv);
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+ }
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+ return ret;
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+}
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+
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+static int sun8i_dwmac_register_mdio_mux(struct stmmac_priv *priv)
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+{
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+ int ret;
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+ struct device_node *mdio_mux;
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+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
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+
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+ mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux");
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+ if (!mdio_mux)
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+ return -ENODEV;
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+
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+ ret = mdio_mux_init(priv->device, mdio_mux, mdio_mux_syscon_switch_fn,
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+ &gmac->mux_handle, priv, priv->mii);
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+ return ret;
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+}
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+
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static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv)
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{
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struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
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@@ -648,35 +807,25 @@ static int sun8i_dwmac_set_syscon(struct
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"Current syscon value is not the default %x (expect %x)\n",
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val, reg);
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- if (gmac->variant->internal_phy) {
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- if (!gmac->use_internal_phy) {
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- /* switch to external PHY interface */
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- reg &= ~H3_EPHY_SELECT;
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- } else {
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- reg |= H3_EPHY_SELECT;
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- reg &= ~H3_EPHY_SHUTDOWN;
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- dev_dbg(priv->device, "Select internal_phy %x\n", reg);
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-
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- if (of_property_read_bool(priv->plat->phy_node,
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- "allwinner,leds-active-low"))
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- reg |= H3_EPHY_LED_POL;
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- else
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- reg &= ~H3_EPHY_LED_POL;
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-
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- /* Force EPHY xtal frequency to 24MHz. */
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- reg |= H3_EPHY_CLK_SEL;
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-
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- ret = of_mdio_parse_addr(priv->device,
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- priv->plat->phy_node);
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- if (ret < 0) {
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- dev_err(priv->device, "Could not parse MDIO addr\n");
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- return ret;
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- }
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- /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY
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- * address. No need to mask it again.
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- */
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- reg |= ret << H3_EPHY_ADDR_SHIFT;
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+ if (gmac->variant->soc_has_internal_phy) {
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+ if (of_property_read_bool(priv->plat->phy_node,
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+ "allwinner,leds-active-low"))
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+ reg |= H3_EPHY_LED_POL;
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+ else
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+ reg &= ~H3_EPHY_LED_POL;
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+
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+ /* Force EPHY xtal frequency to 24MHz. */
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+ reg |= H3_EPHY_CLK_SEL;
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+
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+ ret = of_mdio_parse_addr(priv->device, priv->plat->phy_node);
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+ if (ret < 0) {
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+ dev_err(priv->device, "Could not parse MDIO addr\n");
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+ return ret;
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}
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+ /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY
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+ * address. No need to mask it again.
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+ */
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+ reg |= 1 << H3_EPHY_ADDR_SHIFT;
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}
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if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) {
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@@ -746,81 +895,21 @@ static void sun8i_dwmac_unset_syscon(str
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regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg);
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}
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-static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv)
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+static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)
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{
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- struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
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- int ret;
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-
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- if (!gmac->use_internal_phy)
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- return 0;
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+ struct sunxi_priv_data *gmac = priv;
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- ret = clk_prepare_enable(gmac->ephy_clk);
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- if (ret) {
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- dev_err(priv->device, "Cannot enable ephy\n");
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- return ret;
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+ if (gmac->variant->soc_has_internal_phy) {
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+ /* sun8i_dwmac_exit could be called with mdiomux uninit */
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+ if (gmac->mux_handle)
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+ mdio_mux_uninit(gmac->mux_handle);
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+ if (gmac->internal_phy_powered)
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+ sun8i_dwmac_unpower_internal_phy(gmac);
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}
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- /* Make sure the EPHY is properly reseted, as U-Boot may leave
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- * it at deasserted state, and thus it may fail to reset EMAC.
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- */
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- reset_control_assert(gmac->rst_ephy);
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-
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- ret = reset_control_deassert(gmac->rst_ephy);
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- if (ret) {
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- dev_err(priv->device, "Cannot deassert ephy\n");
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- clk_disable_unprepare(gmac->ephy_clk);
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- return ret;
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- }
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-
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- return 0;
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-}
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-
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-static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac)
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-{
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- if (!gmac->use_internal_phy)
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- return 0;
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-
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- clk_disable_unprepare(gmac->ephy_clk);
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- reset_control_assert(gmac->rst_ephy);
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- return 0;
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-}
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-
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-/* sun8i_power_phy() - Activate the PHY:
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- * In case of error, no need to call sun8i_unpower_phy(),
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- * it will be called anyway by sun8i_dwmac_exit()
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- */
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-static int sun8i_power_phy(struct stmmac_priv *priv)
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-{
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- int ret;
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-
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- ret = sun8i_dwmac_power_internal_phy(priv);
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- if (ret)
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- return ret;
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-
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- ret = sun8i_dwmac_set_syscon(priv);
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- if (ret)
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- return ret;
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-
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- /* After changing syscon value, the MAC need reset or it will use
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- * the last value (and so the last PHY set.
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- */
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- ret = sun8i_dwmac_reset(priv);
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- if (ret)
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- return ret;
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- return 0;
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-}
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-
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-static void sun8i_unpower_phy(struct sunxi_priv_data *gmac)
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-{
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sun8i_dwmac_unset_syscon(gmac);
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- sun8i_dwmac_unpower_internal_phy(gmac);
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-}
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-
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-static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)
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-{
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- struct sunxi_priv_data *gmac = priv;
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- sun8i_unpower_phy(gmac);
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+ reset_control_put(gmac->rst_ephy);
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clk_disable_unprepare(gmac->tx_clk);
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@@ -849,7 +938,7 @@ static struct mac_device_info *sun8i_dwm
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if (!mac)
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return NULL;
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- ret = sun8i_power_phy(priv);
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+ ret = sun8i_dwmac_set_syscon(priv);
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if (ret)
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return NULL;
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@@ -889,6 +978,8 @@ static int sun8i_dwmac_probe(struct plat
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struct sunxi_priv_data *gmac;
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struct device *dev = &pdev->dev;
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int ret;
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+ struct stmmac_priv *priv;
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+ struct net_device *ndev;
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ret = stmmac_get_platform_resources(pdev, &stmmac_res);
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if (ret)
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@@ -932,29 +1023,6 @@ static int sun8i_dwmac_probe(struct plat
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}
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|
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plat_dat->interface = of_get_phy_mode(dev->of_node);
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- if (plat_dat->interface == gmac->variant->internal_phy) {
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- dev_info(&pdev->dev, "Will use internal PHY\n");
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|
- gmac->use_internal_phy = true;
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|
- gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0);
|
|
- if (IS_ERR(gmac->ephy_clk)) {
|
|
- ret = PTR_ERR(gmac->ephy_clk);
|
|
- dev_err(&pdev->dev, "Cannot get EPHY clock: %d\n", ret);
|
|
- return -EINVAL;
|
|
- }
|
|
-
|
|
- gmac->rst_ephy = of_reset_control_get(plat_dat->phy_node, NULL);
|
|
- if (IS_ERR(gmac->rst_ephy)) {
|
|
- ret = PTR_ERR(gmac->rst_ephy);
|
|
- if (ret == -EPROBE_DEFER)
|
|
- return ret;
|
|
- dev_err(&pdev->dev, "No EPHY reset control found %d\n",
|
|
- ret);
|
|
- return -EINVAL;
|
|
- }
|
|
- } else {
|
|
- dev_info(&pdev->dev, "Will use external PHY\n");
|
|
- gmac->use_internal_phy = false;
|
|
- }
|
|
|
|
/* platform data specifying hardware features and callbacks.
|
|
* hardware features were copied from Allwinner drivers.
|
|
@@ -973,9 +1041,34 @@ static int sun8i_dwmac_probe(struct plat
|
|
|
|
ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
|
|
if (ret)
|
|
- sun8i_dwmac_exit(pdev, plat_dat->bsp_priv);
|
|
+ goto dwmac_exit;
|
|
+
|
|
+ ndev = dev_get_drvdata(&pdev->dev);
|
|
+ priv = netdev_priv(ndev);
|
|
+ /* The mux must be registered after parent MDIO
|
|
+ * so after stmmac_dvr_probe()
|
|
+ */
|
|
+ if (gmac->variant->soc_has_internal_phy) {
|
|
+ ret = get_ephy_nodes(priv);
|
|
+ if (ret)
|
|
+ goto dwmac_exit;
|
|
+ ret = sun8i_dwmac_register_mdio_mux(priv);
|
|
+ if (ret) {
|
|
+ dev_err(&pdev->dev, "Failed to register mux\n");
|
|
+ goto dwmac_mux;
|
|
+ }
|
|
+ } else {
|
|
+ ret = sun8i_dwmac_reset(priv);
|
|
+ if (ret)
|
|
+ goto dwmac_exit;
|
|
+ }
|
|
|
|
return ret;
|
|
+dwmac_mux:
|
|
+ sun8i_dwmac_unset_syscon(gmac);
|
|
+dwmac_exit:
|
|
+ sun8i_dwmac_exit(pdev, plat_dat->bsp_priv);
|
|
+return ret;
|
|
}
|
|
|
|
static const struct of_device_id sun8i_dwmac_match[] = {
|
|
|