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1367 lines
39 KiB
1367 lines
39 KiB
From 579f1f6767b1008c6e5ccc2b029acbb56002ed8b Mon Sep 17 00:00:00 2001
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From: Biwen Li <biwen.li@nxp.com>
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Date: Tue, 30 Oct 2018 18:26:20 +0800
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Subject: [PATCH 11/40] dpaa2-rtc: support layerscape
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This is an integrated patch of dpaa2-rtc for layerscape
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Signed-off-by: Catalin Horghidan <catalin.horghidan@nxp.com>
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Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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Signed-off-by: Biwen Li <biwen.li@nxp.com>
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---
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drivers/staging/fsl-dpaa2/rtc/Makefile | 10 +
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drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h | 160 +++++
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drivers/staging/fsl-dpaa2/rtc/dprtc.c | 746 ++++++++++++++++++++++
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drivers/staging/fsl-dpaa2/rtc/dprtc.h | 172 +++++
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drivers/staging/fsl-dpaa2/rtc/rtc.c | 242 +++++++
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5 files changed, 1330 insertions(+)
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create mode 100644 drivers/staging/fsl-dpaa2/rtc/Makefile
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create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h
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create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc.c
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create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc.h
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create mode 100644 drivers/staging/fsl-dpaa2/rtc/rtc.c
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--- /dev/null
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+++ b/drivers/staging/fsl-dpaa2/rtc/Makefile
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@@ -0,0 +1,10 @@
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+
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+obj-$(CONFIG_PTP_1588_CLOCK_DPAA2) += dpaa2-rtc.o
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+
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+dpaa2-rtc-objs := rtc.o dprtc.o
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+
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+all:
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+ make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
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+
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+clean:
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+ make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
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--- /dev/null
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+++ b/drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h
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@@ -0,0 +1,160 @@
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+/* Copyright 2013-2016 Freescale Semiconductor Inc.
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+ *
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+ * Redistribution and use in source and binary forms, with or without
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+ * modification, are permitted provided that the following conditions are met:
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+ * * Redistributions of source code must retain the above copyright
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+ * notice, this list of conditions and the following disclaimer.
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+ * * Redistributions in binary form must reproduce the above copyright
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+ * notice, this list of conditions and the following disclaimer in the
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+ * documentation and/or other materials provided with the distribution.
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+ * * Neither the name of the above-listed copyright holders nor the
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+ * names of any contributors may be used to endorse or promote products
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+ * derived from this software without specific prior written permission.
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+ *
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+ *
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+ * ALTERNATIVELY, this software may be distributed under the terms of the
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+ * GNU General Public License ("GPL") as published by the Free Software
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+ * Foundation, either version 2 of that License or (at your option) any
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+ * later version.
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+ *
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+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
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+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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+ * POSSIBILITY OF SUCH DAMAGE.
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+ */
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+#ifndef _FSL_DPRTC_CMD_H
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+#define _FSL_DPRTC_CMD_H
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+
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+/* DPRTC Version */
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+#define DPRTC_VER_MAJOR 2
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+#define DPRTC_VER_MINOR 0
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+
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+/* Command versioning */
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+#define DPRTC_CMD_BASE_VERSION 1
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+#define DPRTC_CMD_ID_OFFSET 4
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+
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+#define DPRTC_CMD(id) (((id) << DPRTC_CMD_ID_OFFSET) | DPRTC_CMD_BASE_VERSION)
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+
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+/* Command IDs */
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+#define DPRTC_CMDID_CLOSE DPRTC_CMD(0x800)
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+#define DPRTC_CMDID_OPEN DPRTC_CMD(0x810)
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+#define DPRTC_CMDID_CREATE DPRTC_CMD(0x910)
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+#define DPRTC_CMDID_DESTROY DPRTC_CMD(0x990)
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+#define DPRTC_CMDID_GET_API_VERSION DPRTC_CMD(0xa10)
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+
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+#define DPRTC_CMDID_ENABLE DPRTC_CMD(0x002)
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+#define DPRTC_CMDID_DISABLE DPRTC_CMD(0x003)
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+#define DPRTC_CMDID_GET_ATTR DPRTC_CMD(0x004)
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+#define DPRTC_CMDID_RESET DPRTC_CMD(0x005)
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+#define DPRTC_CMDID_IS_ENABLED DPRTC_CMD(0x006)
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+
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+#define DPRTC_CMDID_SET_IRQ_ENABLE DPRTC_CMD(0x012)
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+#define DPRTC_CMDID_GET_IRQ_ENABLE DPRTC_CMD(0x013)
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+#define DPRTC_CMDID_SET_IRQ_MASK DPRTC_CMD(0x014)
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+#define DPRTC_CMDID_GET_IRQ_MASK DPRTC_CMD(0x015)
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+#define DPRTC_CMDID_GET_IRQ_STATUS DPRTC_CMD(0x016)
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+#define DPRTC_CMDID_CLEAR_IRQ_STATUS DPRTC_CMD(0x017)
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+
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+#define DPRTC_CMDID_SET_CLOCK_OFFSET DPRTC_CMD(0x1d0)
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+#define DPRTC_CMDID_SET_FREQ_COMPENSATION DPRTC_CMD(0x1d1)
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+#define DPRTC_CMDID_GET_FREQ_COMPENSATION DPRTC_CMD(0x1d2)
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+#define DPRTC_CMDID_GET_TIME DPRTC_CMD(0x1d3)
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+#define DPRTC_CMDID_SET_TIME DPRTC_CMD(0x1d4)
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+#define DPRTC_CMDID_SET_ALARM DPRTC_CMD(0x1d5)
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+#define DPRTC_CMDID_SET_PERIODIC_PULSE DPRTC_CMD(0x1d6)
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+#define DPRTC_CMDID_CLEAR_PERIODIC_PULSE DPRTC_CMD(0x1d7)
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+#define DPRTC_CMDID_SET_EXT_TRIGGER DPRTC_CMD(0x1d8)
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+#define DPRTC_CMDID_CLEAR_EXT_TRIGGER DPRTC_CMD(0x1d9)
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+#define DPRTC_CMDID_GET_EXT_TRIGGER_TIMESTAMP DPRTC_CMD(0x1dA)
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+
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+/* Macros for accessing command fields smaller than 1byte */
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+#define DPRTC_MASK(field) \
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+ GENMASK(DPRTC_##field##_SHIFT + DPRTC_##field##_SIZE - 1, \
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+ DPRTC_##field##_SHIFT)
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+#define dprtc_get_field(var, field) \
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+ (((var) & DPRTC_MASK(field)) >> DPRTC_##field##_SHIFT)
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+
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+#pragma pack(push, 1)
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+struct dprtc_cmd_open {
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+ uint32_t dprtc_id;
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+};
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+
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+struct dprtc_cmd_destroy {
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+ uint32_t object_id;
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+};
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+
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+#define DPRTC_ENABLE_SHIFT 0
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+#define DPRTC_ENABLE_SIZE 1
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+
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+struct dprtc_rsp_is_enabled {
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+ uint8_t en;
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+};
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+
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+struct dprtc_cmd_get_irq {
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+ uint32_t pad;
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+ uint8_t irq_index;
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+};
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+
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+struct dprtc_cmd_set_irq_enable {
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+ uint8_t en;
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+ uint8_t pad[3];
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+ uint8_t irq_index;
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+};
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+
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+struct dprtc_rsp_get_irq_enable {
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+ uint8_t en;
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+};
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+
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+struct dprtc_cmd_set_irq_mask {
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+ uint32_t mask;
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+ uint8_t irq_index;
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+};
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+
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+struct dprtc_rsp_get_irq_mask {
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+ uint32_t mask;
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+};
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+
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+struct dprtc_cmd_get_irq_status {
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+ uint32_t status;
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+ uint8_t irq_index;
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+};
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+
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+struct dprtc_rsp_get_irq_status {
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+ uint32_t status;
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+};
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+
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+struct dprtc_cmd_clear_irq_status {
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+ uint32_t status;
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+ uint8_t irq_index;
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+};
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+
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+struct dprtc_rsp_get_attributes {
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+ uint32_t pad;
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+ uint32_t id;
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+};
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+
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+struct dprtc_cmd_set_clock_offset {
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+ uint64_t offset;
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+};
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+
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+struct dprtc_get_freq_compensation {
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+ uint32_t freq_compensation;
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+};
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+
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+struct dprtc_time {
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+ uint64_t time;
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+};
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+
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+struct dprtc_rsp_get_api_version {
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+ uint16_t major;
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+ uint16_t minor;
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+};
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+#pragma pack(pop)
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+#endif /* _FSL_DPRTC_CMD_H */
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--- /dev/null
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+++ b/drivers/staging/fsl-dpaa2/rtc/dprtc.c
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@@ -0,0 +1,746 @@
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+/* Copyright 2013-2016 Freescale Semiconductor Inc.
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+ *
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+ * Redistribution and use in source and binary forms, with or without
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+ * modification, are permitted provided that the following conditions are met:
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+ * * Redistributions of source code must retain the above copyright
|
|
+ * notice, this list of conditions and the following disclaimer.
|
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+ * * Redistributions in binary form must reproduce the above copyright
|
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+ * notice, this list of conditions and the following disclaimer in the
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+ * documentation and/or other materials provided with the distribution.
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+ * * Neither the name of the above-listed copyright holders nor the
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+ * names of any contributors may be used to endorse or promote products
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+ * derived from this software without specific prior written permission.
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+ *
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+ *
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+ * ALTERNATIVELY, this software may be distributed under the terms of the
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+ * GNU General Public License ("GPL") as published by the Free Software
|
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+ * Foundation, either version 2 of that License or (at your option) any
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+ * later version.
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+ *
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+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
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+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
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+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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+ * POSSIBILITY OF SUCH DAMAGE.
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+ */
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+#include <linux/fsl/mc.h>
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+
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+#include "dprtc.h"
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+#include "dprtc-cmd.h"
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+
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+/**
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+ * dprtc_open() - Open a control session for the specified object.
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @dprtc_id: DPRTC unique ID
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+ * @token: Returned token; use in subsequent API calls
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+ *
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+ * This function can be used to open a control session for an
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+ * already created object; an object may have been declared in
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+ * the DPL or by calling the dprtc_create function.
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+ * This function returns a unique authentication token,
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+ * associated with the specific object ID and the specific MC
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+ * portal; this token must be used in all subsequent commands for
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+ * this specific object
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+ *
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+ * Return: '0' on Success; Error code otherwise.
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+ */
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+int dprtc_open(struct fsl_mc_io *mc_io,
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+ uint32_t cmd_flags,
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+ int dprtc_id,
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+ uint16_t *token)
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+{
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+ struct dprtc_cmd_open *cmd_params;
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+ struct fsl_mc_command cmd = { 0 };
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+ int err;
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+
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+ /* prepare command */
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+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_OPEN,
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+ cmd_flags,
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+ 0);
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+ cmd_params = (struct dprtc_cmd_open *)cmd.params;
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+ cmd_params->dprtc_id = cpu_to_le32(dprtc_id);
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+
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+ /* send command to mc*/
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+ err = mc_send_command(mc_io, &cmd);
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+ if (err)
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+ return err;
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+
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+ /* retrieve response parameters */
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+ *token = mc_cmd_hdr_read_token(&cmd);
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+
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+ return err;
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+}
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+
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+/**
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+ * dprtc_close() - Close the control session of the object
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @token: Token of DPRTC object
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+ *
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+ * After this function is called, no further operations are
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+ * allowed on the object without opening a new control session.
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+ *
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+ * Return: '0' on Success; Error code otherwise.
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+ */
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+int dprtc_close(struct fsl_mc_io *mc_io,
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+ uint32_t cmd_flags,
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+ uint16_t token)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+
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+ /* prepare command */
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+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLOSE, cmd_flags,
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+ token);
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+
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+ /* send command to mc*/
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+ return mc_send_command(mc_io, &cmd);
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+}
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+
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+/**
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+ * dprtc_create() - Create the DPRTC object.
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @dprc_token: Parent container token; '0' for default container
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @cfg: Configuration structure
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+ * @obj_id: Returned object id
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+ *
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+ * Create the DPRTC object, allocate required resources and
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+ * perform required initialization.
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+ *
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+ * The function accepts an authentication token of a parent
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+ * container that this object should be assigned to. The token
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+ * can be '0' so the object will be assigned to the default container.
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+ * The newly created object can be opened with the returned
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+ * object id and using the container's associated tokens and MC portals.
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+ *
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+ * Return: '0' on Success; Error code otherwise.
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+ */
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+int dprtc_create(struct fsl_mc_io *mc_io,
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+ uint16_t dprc_token,
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+ uint32_t cmd_flags,
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+ const struct dprtc_cfg *cfg,
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+ uint32_t *obj_id)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+ int err;
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+
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+ (void)(cfg); /* unused */
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+
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+ /* prepare command */
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+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CREATE,
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+ cmd_flags,
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+ dprc_token);
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+
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+ /* send command to mc*/
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+ err = mc_send_command(mc_io, &cmd);
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+ if (err)
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+ return err;
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+
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+ /* retrieve response parameters */
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+ *obj_id = mc_cmd_read_object_id(&cmd);
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+
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+ return 0;
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+}
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+
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+/**
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+ * dprtc_destroy() - Destroy the DPRTC object and release all its resources.
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @dprc_token: Parent container token; '0' for default container
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @object_id: The object id; it must be a valid id within the container that
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+ * created this object;
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+ *
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+ * The function accepts the authentication token of the parent container that
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+ * created the object (not the one that currently owns the object). The object
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+ * is searched within parent using the provided 'object_id'.
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+ * All tokens to the object must be closed before calling destroy.
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+ *
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+ * Return: '0' on Success; error code otherwise.
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+ */
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+int dprtc_destroy(struct fsl_mc_io *mc_io,
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+ uint16_t dprc_token,
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+ uint32_t cmd_flags,
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+ uint32_t object_id)
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+{
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+ struct dprtc_cmd_destroy *cmd_params;
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+ struct fsl_mc_command cmd = { 0 };
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+
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+ /* prepare command */
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+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DESTROY,
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+ cmd_flags,
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+ dprc_token);
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+ cmd_params = (struct dprtc_cmd_destroy *)cmd.params;
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+ cmd_params->object_id = cpu_to_le32(object_id);
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+
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+ /* send command to mc*/
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+ return mc_send_command(mc_io, &cmd);
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+}
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+
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+int dprtc_enable(struct fsl_mc_io *mc_io,
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+ uint32_t cmd_flags,
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+ uint16_t token)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+
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+ /* prepare command */
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+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_ENABLE, cmd_flags,
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+ token);
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+
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+ /* send command to mc*/
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+ return mc_send_command(mc_io, &cmd);
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+}
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+
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+int dprtc_disable(struct fsl_mc_io *mc_io,
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+ uint32_t cmd_flags,
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+ uint16_t token)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+
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+ /* prepare command */
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+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DISABLE,
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+ cmd_flags,
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+ token);
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+
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+ /* send command to mc*/
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+ return mc_send_command(mc_io, &cmd);
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+}
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+
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+int dprtc_is_enabled(struct fsl_mc_io *mc_io,
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+ uint32_t cmd_flags,
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+ uint16_t token,
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+ int *en)
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+{
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+ struct dprtc_rsp_is_enabled *rsp_params;
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+ struct fsl_mc_command cmd = { 0 };
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+ int err;
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+
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+ /* prepare command */
|
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+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_IS_ENABLED, cmd_flags,
|
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+ token);
|
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+
|
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+ /* send command to mc*/
|
|
+ err = mc_send_command(mc_io, &cmd);
|
|
+ if (err)
|
|
+ return err;
|
|
+
|
|
+ /* retrieve response parameters */
|
|
+ rsp_params = (struct dprtc_rsp_is_enabled *)cmd.params;
|
|
+ *en = dprtc_get_field(rsp_params->en, ENABLE);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+int dprtc_reset(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token)
|
|
+{
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_RESET,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+
|
|
+ /* send command to mc*/
|
|
+ return mc_send_command(mc_io, &cmd);
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_set_irq_enable() - Set overall interrupt state.
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @token: Token of DPRTC object
|
|
+ * @irq_index: The interrupt index to configure
|
|
+ * @en: Interrupt state - enable = 1, disable = 0
|
|
+ *
|
|
+ * Allows GPP software to control when interrupts are generated.
|
|
+ * Each interrupt can have up to 32 causes. The enable/disable control's the
|
|
+ * overall interrupt state. if the interrupt is disabled no causes will cause
|
|
+ * an interrupt.
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint8_t irq_index,
|
|
+ uint8_t en)
|
|
+{
|
|
+ struct dprtc_cmd_set_irq_enable *cmd_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_ENABLE,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+ cmd_params = (struct dprtc_cmd_set_irq_enable *)cmd.params;
|
|
+ cmd_params->irq_index = irq_index;
|
|
+ cmd_params->en = en;
|
|
+
|
|
+ /* send command to mc*/
|
|
+ return mc_send_command(mc_io, &cmd);
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_get_irq_enable() - Get overall interrupt state
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @token: Token of DPRTC object
|
|
+ * @irq_index: The interrupt index to configure
|
|
+ * @en: Returned interrupt state - enable = 1, disable = 0
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint8_t irq_index,
|
|
+ uint8_t *en)
|
|
+{
|
|
+ struct dprtc_rsp_get_irq_enable *rsp_params;
|
|
+ struct dprtc_cmd_get_irq *cmd_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+ int err;
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_ENABLE,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+ cmd_params = (struct dprtc_cmd_get_irq *)cmd.params;
|
|
+ cmd_params->irq_index = irq_index;
|
|
+
|
|
+ /* send command to mc*/
|
|
+ err = mc_send_command(mc_io, &cmd);
|
|
+ if (err)
|
|
+ return err;
|
|
+
|
|
+ /* retrieve response parameters */
|
|
+ rsp_params = (struct dprtc_rsp_get_irq_enable *)cmd.params;
|
|
+ *en = rsp_params->en;
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_set_irq_mask() - Set interrupt mask.
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @token: Token of DPRTC object
|
|
+ * @irq_index: The interrupt index to configure
|
|
+ * @mask: Event mask to trigger interrupt;
|
|
+ * each bit:
|
|
+ * 0 = ignore event
|
|
+ * 1 = consider event for asserting IRQ
|
|
+ *
|
|
+ * Every interrupt can have up to 32 causes and the interrupt model supports
|
|
+ * masking/unmasking each cause independently
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint8_t irq_index,
|
|
+ uint32_t mask)
|
|
+{
|
|
+ struct dprtc_cmd_set_irq_mask *cmd_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_MASK,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+ cmd_params = (struct dprtc_cmd_set_irq_mask *)cmd.params;
|
|
+ cmd_params->mask = cpu_to_le32(mask);
|
|
+ cmd_params->irq_index = irq_index;
|
|
+
|
|
+ /* send command to mc*/
|
|
+ return mc_send_command(mc_io, &cmd);
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_get_irq_mask() - Get interrupt mask.
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @token: Token of DPRTC object
|
|
+ * @irq_index: The interrupt index to configure
|
|
+ * @mask: Returned event mask to trigger interrupt
|
|
+ *
|
|
+ * Every interrupt can have up to 32 causes and the interrupt model supports
|
|
+ * masking/unmasking each cause independently
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint8_t irq_index,
|
|
+ uint32_t *mask)
|
|
+{
|
|
+ struct dprtc_rsp_get_irq_mask *rsp_params;
|
|
+ struct dprtc_cmd_get_irq *cmd_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+ int err;
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_MASK,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+ cmd_params = (struct dprtc_cmd_get_irq *)cmd.params;
|
|
+ cmd_params->irq_index = irq_index;
|
|
+
|
|
+ /* send command to mc*/
|
|
+ err = mc_send_command(mc_io, &cmd);
|
|
+ if (err)
|
|
+ return err;
|
|
+
|
|
+ /* retrieve response parameters */
|
|
+ rsp_params = (struct dprtc_rsp_get_irq_mask *)cmd.params;
|
|
+ *mask = le32_to_cpu(rsp_params->mask);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_get_irq_status() - Get the current status of any pending interrupts.
|
|
+ *
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @token: Token of DPRTC object
|
|
+ * @irq_index: The interrupt index to configure
|
|
+ * @status: Returned interrupts status - one bit per cause:
|
|
+ * 0 = no interrupt pending
|
|
+ * 1 = interrupt pending
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint8_t irq_index,
|
|
+ uint32_t *status)
|
|
+{
|
|
+ struct dprtc_cmd_get_irq_status *cmd_params;
|
|
+ struct dprtc_rsp_get_irq_status *rsp_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+ int err;
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_STATUS,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+ cmd_params = (struct dprtc_cmd_get_irq_status *)cmd.params;
|
|
+ cmd_params->status = cpu_to_le32(*status);
|
|
+ cmd_params->irq_index = irq_index;
|
|
+
|
|
+ /* send command to mc*/
|
|
+ err = mc_send_command(mc_io, &cmd);
|
|
+ if (err)
|
|
+ return err;
|
|
+
|
|
+ /* retrieve response parameters */
|
|
+ rsp_params = (struct dprtc_rsp_get_irq_status *)cmd.params;
|
|
+ *status = rsp_params->status;
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_clear_irq_status() - Clear a pending interrupt's status
|
|
+ *
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @token: Token of DPRTC object
|
|
+ * @irq_index: The interrupt index to configure
|
|
+ * @status: Bits to clear (W1C) - one bit per cause:
|
|
+ * 0 = don't change
|
|
+ * 1 = clear status bit
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint8_t irq_index,
|
|
+ uint32_t status)
|
|
+{
|
|
+ struct dprtc_cmd_clear_irq_status *cmd_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLEAR_IRQ_STATUS,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+ cmd_params = (struct dprtc_cmd_clear_irq_status *)cmd.params;
|
|
+ cmd_params->irq_index = irq_index;
|
|
+ cmd_params->status = cpu_to_le32(status);
|
|
+
|
|
+ /* send command to mc*/
|
|
+ return mc_send_command(mc_io, &cmd);
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_get_attributes - Retrieve DPRTC attributes.
|
|
+ *
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @token: Token of DPRTC object
|
|
+ * @attr: Returned object's attributes
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_get_attributes(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ struct dprtc_attr *attr)
|
|
+{
|
|
+ struct dprtc_rsp_get_attributes *rsp_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+ int err;
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_ATTR,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+
|
|
+ /* send command to mc*/
|
|
+ err = mc_send_command(mc_io, &cmd);
|
|
+ if (err)
|
|
+ return err;
|
|
+
|
|
+ /* retrieve response parameters */
|
|
+ rsp_params = (struct dprtc_rsp_get_attributes *)cmd.params;
|
|
+ attr->id = le32_to_cpu(rsp_params->id);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_set_clock_offset() - Sets the clock's offset
|
|
+ * (usually relative to another clock).
|
|
+ *
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @token: Token of DPRTC object
|
|
+ * @offset: New clock offset (in nanoseconds).
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ int64_t offset)
|
|
+{
|
|
+ struct dprtc_cmd_set_clock_offset *cmd_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_CLOCK_OFFSET,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+ cmd_params = (struct dprtc_cmd_set_clock_offset *)cmd.params;
|
|
+ cmd_params->offset = cpu_to_le64(offset);
|
|
+
|
|
+ /* send command to mc*/
|
|
+ return mc_send_command(mc_io, &cmd);
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_set_freq_compensation() - Sets a new frequency compensation value.
|
|
+ *
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @token: Token of DPRTC object
|
|
+ * @freq_compensation: The new frequency compensation value to set.
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint32_t freq_compensation)
|
|
+{
|
|
+ struct dprtc_get_freq_compensation *cmd_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_FREQ_COMPENSATION,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+ cmd_params = (struct dprtc_get_freq_compensation *)cmd.params;
|
|
+ cmd_params->freq_compensation = cpu_to_le32(freq_compensation);
|
|
+
|
|
+ /* send command to mc*/
|
|
+ return mc_send_command(mc_io, &cmd);
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_get_freq_compensation() - Retrieves the frequency compensation value
|
|
+ *
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @token: Token of DPRTC object
|
|
+ * @freq_compensation: Frequency compensation value
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint32_t *freq_compensation)
|
|
+{
|
|
+ struct dprtc_get_freq_compensation *rsp_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+ int err;
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_FREQ_COMPENSATION,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+
|
|
+ /* send command to mc*/
|
|
+ err = mc_send_command(mc_io, &cmd);
|
|
+ if (err)
|
|
+ return err;
|
|
+
|
|
+ /* retrieve response parameters */
|
|
+ rsp_params = (struct dprtc_get_freq_compensation *)cmd.params;
|
|
+ *freq_compensation = le32_to_cpu(rsp_params->freq_compensation);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_get_time() - Returns the current RTC time.
|
|
+ *
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @token: Token of DPRTC object
|
|
+ * @time: Current RTC time.
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_get_time(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint64_t *time)
|
|
+{
|
|
+ struct dprtc_time *rsp_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+ int err;
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_TIME,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+
|
|
+ /* send command to mc*/
|
|
+ err = mc_send_command(mc_io, &cmd);
|
|
+ if (err)
|
|
+ return err;
|
|
+
|
|
+ /* retrieve response parameters */
|
|
+ rsp_params = (struct dprtc_time *)cmd.params;
|
|
+ *time = le64_to_cpu(rsp_params->time);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_set_time() - Updates current RTC time.
|
|
+ *
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @token: Token of DPRTC object
|
|
+ * @time: New RTC time.
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_set_time(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint64_t time)
|
|
+{
|
|
+ struct dprtc_time *cmd_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_TIME,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+ cmd_params = (struct dprtc_time *)cmd.params;
|
|
+ cmd_params->time = cpu_to_le64(time);
|
|
+
|
|
+ /* send command to mc*/
|
|
+ return mc_send_command(mc_io, &cmd);
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_set_alarm() - Defines and sets alarm.
|
|
+ *
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @token: Token of DPRTC object
|
|
+ * @time: In nanoseconds, the time when the alarm
|
|
+ * should go off - must be a multiple of
|
|
+ * 1 microsecond
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_set_alarm(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token, uint64_t time)
|
|
+{
|
|
+ struct dprtc_time *cmd_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+
|
|
+ /* prepare command */
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_ALARM,
|
|
+ cmd_flags,
|
|
+ token);
|
|
+ cmd_params = (struct dprtc_time *)cmd.params;
|
|
+ cmd_params->time = cpu_to_le64(time);
|
|
+
|
|
+ /* send command to mc*/
|
|
+ return mc_send_command(mc_io, &cmd);
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dprtc_get_api_version() - Get Data Path Real Time Counter API version
|
|
+ * @mc_io: Pointer to MC portal's I/O object
|
|
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
|
+ * @major_ver: Major version of data path real time counter API
|
|
+ * @minor_ver: Minor version of data path real time counter API
|
|
+ *
|
|
+ * Return: '0' on Success; Error code otherwise.
|
|
+ */
|
|
+int dprtc_get_api_version(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t *major_ver,
|
|
+ uint16_t *minor_ver)
|
|
+{
|
|
+ struct dprtc_rsp_get_api_version *rsp_params;
|
|
+ struct fsl_mc_command cmd = { 0 };
|
|
+ int err;
|
|
+
|
|
+ cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_API_VERSION,
|
|
+ cmd_flags,
|
|
+ 0);
|
|
+
|
|
+ err = mc_send_command(mc_io, &cmd);
|
|
+ if (err)
|
|
+ return err;
|
|
+
|
|
+ rsp_params = (struct dprtc_rsp_get_api_version *)cmd.params;
|
|
+ *major_ver = le16_to_cpu(rsp_params->major);
|
|
+ *minor_ver = le16_to_cpu(rsp_params->minor);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
--- /dev/null
|
|
+++ b/drivers/staging/fsl-dpaa2/rtc/dprtc.h
|
|
@@ -0,0 +1,172 @@
|
|
+/* Copyright 2013-2016 Freescale Semiconductor Inc.
|
|
+ *
|
|
+ * Redistribution and use in source and binary forms, with or without
|
|
+ * modification, are permitted provided that the following conditions are met:
|
|
+ * * Redistributions of source code must retain the above copyright
|
|
+ * notice, this list of conditions and the following disclaimer.
|
|
+ * * Redistributions in binary form must reproduce the above copyright
|
|
+ * notice, this list of conditions and the following disclaimer in the
|
|
+ * documentation and/or other materials provided with the distribution.
|
|
+ * * Neither the name of the above-listed copyright holders nor the
|
|
+ * names of any contributors may be used to endorse or promote products
|
|
+ * derived from this software without specific prior written permission.
|
|
+ *
|
|
+ *
|
|
+ * ALTERNATIVELY, this software may be distributed under the terms of the
|
|
+ * GNU General Public License ("GPL") as published by the Free Software
|
|
+ * Foundation, either version 2 of that License or (at your option) any
|
|
+ * later version.
|
|
+ *
|
|
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
|
|
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
+ * POSSIBILITY OF SUCH DAMAGE.
|
|
+ */
|
|
+#ifndef __FSL_DPRTC_H
|
|
+#define __FSL_DPRTC_H
|
|
+
|
|
+/* Data Path Real Time Counter API
|
|
+ * Contains initialization APIs and runtime control APIs for RTC
|
|
+ */
|
|
+
|
|
+struct fsl_mc_io;
|
|
+
|
|
+/**
|
|
+ * Number of irq's
|
|
+ */
|
|
+#define DPRTC_MAX_IRQ_NUM 1
|
|
+#define DPRTC_IRQ_INDEX 0
|
|
+
|
|
+/**
|
|
+ * Interrupt event masks:
|
|
+ */
|
|
+
|
|
+/**
|
|
+ * Interrupt event mask indicating alarm event had occurred
|
|
+ */
|
|
+#define DPRTC_EVENT_ALARM 0x40000000
|
|
+/**
|
|
+ * Interrupt event mask indicating periodic pulse event had occurred
|
|
+ */
|
|
+#define DPRTC_EVENT_PPS 0x08000000
|
|
+
|
|
+int dprtc_open(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ int dprtc_id,
|
|
+ uint16_t *token);
|
|
+
|
|
+int dprtc_close(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token);
|
|
+
|
|
+/**
|
|
+ * struct dprtc_cfg - Structure representing DPRTC configuration
|
|
+ * @options: place holder
|
|
+ */
|
|
+struct dprtc_cfg {
|
|
+ uint32_t options;
|
|
+};
|
|
+
|
|
+int dprtc_create(struct fsl_mc_io *mc_io,
|
|
+ uint16_t dprc_token,
|
|
+ uint32_t cmd_flags,
|
|
+ const struct dprtc_cfg *cfg,
|
|
+ uint32_t *obj_id);
|
|
+
|
|
+int dprtc_destroy(struct fsl_mc_io *mc_io,
|
|
+ uint16_t dprc_token,
|
|
+ uint32_t cmd_flags,
|
|
+ uint32_t object_id);
|
|
+
|
|
+int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ int64_t offset);
|
|
+
|
|
+int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint32_t freq_compensation);
|
|
+
|
|
+int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint32_t *freq_compensation);
|
|
+
|
|
+int dprtc_get_time(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint64_t *time);
|
|
+
|
|
+int dprtc_set_time(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint64_t time);
|
|
+
|
|
+int dprtc_set_alarm(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint64_t time);
|
|
+
|
|
+int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint8_t irq_index,
|
|
+ uint8_t en);
|
|
+
|
|
+int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint8_t irq_index,
|
|
+ uint8_t *en);
|
|
+
|
|
+int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint8_t irq_index,
|
|
+ uint32_t mask);
|
|
+
|
|
+int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint8_t irq_index,
|
|
+ uint32_t *mask);
|
|
+
|
|
+int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint8_t irq_index,
|
|
+ uint32_t *status);
|
|
+
|
|
+int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ uint8_t irq_index,
|
|
+ uint32_t status);
|
|
+
|
|
+/**
|
|
+ * struct dprtc_attr - Structure representing DPRTC attributes
|
|
+ * @id: DPRTC object ID
|
|
+ */
|
|
+struct dprtc_attr {
|
|
+ int id;
|
|
+};
|
|
+
|
|
+int dprtc_get_attributes(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t token,
|
|
+ struct dprtc_attr *attr);
|
|
+
|
|
+int dprtc_get_api_version(struct fsl_mc_io *mc_io,
|
|
+ uint32_t cmd_flags,
|
|
+ uint16_t *major_ver,
|
|
+ uint16_t *minor_ver);
|
|
+
|
|
+#endif /* __FSL_DPRTC_H */
|
|
--- /dev/null
|
|
+++ b/drivers/staging/fsl-dpaa2/rtc/rtc.c
|
|
@@ -0,0 +1,242 @@
|
|
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
|
|
+ *
|
|
+ * Redistribution and use in source and binary forms, with or without
|
|
+ * modification, are permitted provided that the following conditions are met:
|
|
+ * * Redistributions of source code must retain the above copyright
|
|
+ * notice, this list of conditions and the following disclaimer.
|
|
+ * * Redistributions in binary form must reproduce the above copyright
|
|
+ * notice, this list of conditions and the following disclaimer in the
|
|
+ * documentation and/or other materials provided with the distribution.
|
|
+ * * Neither the name of the above-listed copyright holders nor the
|
|
+ * names of any contributors may be used to endorse or promote products
|
|
+ * derived from this software without specific prior written permission.
|
|
+ *
|
|
+ *
|
|
+ * ALTERNATIVELY, this software may be distributed under the terms of the
|
|
+ * GNU General Public License ("GPL") as published by the Free Software
|
|
+ * Foundation, either version 2 of that License or (at your option) any
|
|
+ * later version.
|
|
+ *
|
|
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
|
|
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
+ * POSSIBILITY OF SUCH DAMAGE.
|
|
+ */
|
|
+
|
|
+#include <linux/module.h>
|
|
+#include <linux/ptp_clock_kernel.h>
|
|
+
|
|
+#include <linux/fsl/mc.h>
|
|
+
|
|
+#include "dprtc.h"
|
|
+#include "dprtc-cmd.h"
|
|
+
|
|
+#define N_EXT_TS 2
|
|
+
|
|
+struct ptp_clock *clock;
|
|
+struct fsl_mc_device *rtc_mc_dev;
|
|
+u32 freqCompensation;
|
|
+
|
|
+/* PTP clock operations */
|
|
+static int ptp_dpaa2_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
|
|
+{
|
|
+ u64 adj;
|
|
+ u32 diff, tmr_add;
|
|
+ int neg_adj = 0;
|
|
+ int err = 0;
|
|
+ struct fsl_mc_device *mc_dev = rtc_mc_dev;
|
|
+ struct device *dev = &mc_dev->dev;
|
|
+
|
|
+ if (ppb < 0) {
|
|
+ neg_adj = 1;
|
|
+ ppb = -ppb;
|
|
+ }
|
|
+
|
|
+ tmr_add = freqCompensation;
|
|
+ adj = tmr_add;
|
|
+ adj *= ppb;
|
|
+ diff = div_u64(adj, 1000000000ULL);
|
|
+
|
|
+ tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
|
|
+
|
|
+ err = dprtc_set_freq_compensation(mc_dev->mc_io, 0,
|
|
+ mc_dev->mc_handle, tmr_add);
|
|
+ if (err)
|
|
+ dev_err(dev, "dprtc_set_freq_compensation err %d\n", err);
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int ptp_dpaa2_adjtime(struct ptp_clock_info *ptp, s64 delta)
|
|
+{
|
|
+ s64 now;
|
|
+ int err = 0;
|
|
+ struct fsl_mc_device *mc_dev = rtc_mc_dev;
|
|
+ struct device *dev = &mc_dev->dev;
|
|
+
|
|
+ err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &now);
|
|
+ if (err) {
|
|
+ dev_err(dev, "dprtc_get_time err %d\n", err);
|
|
+ return 0;
|
|
+ }
|
|
+
|
|
+ now += delta;
|
|
+
|
|
+ err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, now);
|
|
+ if (err) {
|
|
+ dev_err(dev, "dprtc_set_time err %d\n", err);
|
|
+ return 0;
|
|
+ }
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int ptp_dpaa2_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
|
|
+{
|
|
+ u64 ns;
|
|
+ u32 remainder;
|
|
+ int err = 0;
|
|
+ struct fsl_mc_device *mc_dev = rtc_mc_dev;
|
|
+ struct device *dev = &mc_dev->dev;
|
|
+
|
|
+ err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &ns);
|
|
+ if (err) {
|
|
+ dev_err(dev, "dprtc_get_time err %d\n", err);
|
|
+ return 0;
|
|
+ }
|
|
+
|
|
+ ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
|
|
+ ts->tv_nsec = remainder;
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int ptp_dpaa2_settime(struct ptp_clock_info *ptp,
|
|
+ const struct timespec *ts)
|
|
+{
|
|
+ u64 ns;
|
|
+ int err = 0;
|
|
+ struct fsl_mc_device *mc_dev = rtc_mc_dev;
|
|
+ struct device *dev = &mc_dev->dev;
|
|
+
|
|
+ ns = ts->tv_sec * 1000000000ULL;
|
|
+ ns += ts->tv_nsec;
|
|
+
|
|
+ err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, ns);
|
|
+ if (err)
|
|
+ dev_err(dev, "dprtc_set_time err %d\n", err);
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static struct ptp_clock_info ptp_dpaa2_caps = {
|
|
+ .owner = THIS_MODULE,
|
|
+ .name = "dpaa2 clock",
|
|
+ .max_adj = 512000,
|
|
+ .n_alarm = 0,
|
|
+ .n_ext_ts = N_EXT_TS,
|
|
+ .n_per_out = 0,
|
|
+ .n_pins = 0,
|
|
+ .pps = 1,
|
|
+ .adjfreq = ptp_dpaa2_adjfreq,
|
|
+ .adjtime = ptp_dpaa2_adjtime,
|
|
+ .gettime64 = ptp_dpaa2_gettime,
|
|
+ .settime64 = ptp_dpaa2_settime,
|
|
+};
|
|
+
|
|
+static int rtc_probe(struct fsl_mc_device *mc_dev)
|
|
+{
|
|
+ struct device *dev;
|
|
+ int err = 0;
|
|
+ int dpaa2_phc_index;
|
|
+ u32 tmr_add = 0;
|
|
+
|
|
+ if (!mc_dev)
|
|
+ return -EFAULT;
|
|
+
|
|
+ dev = &mc_dev->dev;
|
|
+
|
|
+ err = fsl_mc_portal_allocate(mc_dev, 0, &mc_dev->mc_io);
|
|
+ if (unlikely(err)) {
|
|
+ dev_err(dev, "fsl_mc_portal_allocate err %d\n", err);
|
|
+ goto err_exit;
|
|
+ }
|
|
+ if (!mc_dev->mc_io) {
|
|
+ dev_err(dev,
|
|
+ "fsl_mc_portal_allocate returned null handle but no error\n");
|
|
+ err = -EFAULT;
|
|
+ goto err_exit;
|
|
+ }
|
|
+
|
|
+ err = dprtc_open(mc_dev->mc_io, 0, mc_dev->obj_desc.id,
|
|
+ &mc_dev->mc_handle);
|
|
+ if (err) {
|
|
+ dev_err(dev, "dprtc_open err %d\n", err);
|
|
+ goto err_free_mcp;
|
|
+ }
|
|
+ if (!mc_dev->mc_handle) {
|
|
+ dev_err(dev, "dprtc_open returned null handle but no error\n");
|
|
+ err = -EFAULT;
|
|
+ goto err_free_mcp;
|
|
+ }
|
|
+
|
|
+ rtc_mc_dev = mc_dev;
|
|
+
|
|
+ err = dprtc_get_freq_compensation(mc_dev->mc_io, 0,
|
|
+ mc_dev->mc_handle, &tmr_add);
|
|
+ if (err) {
|
|
+ dev_err(dev, "dprtc_get_freq_compensation err %d\n", err);
|
|
+ goto err_close;
|
|
+ }
|
|
+ freqCompensation = tmr_add;
|
|
+
|
|
+ clock = ptp_clock_register(&ptp_dpaa2_caps, dev);
|
|
+ if (IS_ERR(clock)) {
|
|
+ err = PTR_ERR(clock);
|
|
+ goto err_close;
|
|
+ }
|
|
+ dpaa2_phc_index = ptp_clock_index(clock);
|
|
+
|
|
+ return 0;
|
|
+err_close:
|
|
+ dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
|
|
+err_free_mcp:
|
|
+ fsl_mc_portal_free(mc_dev->mc_io);
|
|
+err_exit:
|
|
+ return err;
|
|
+}
|
|
+
|
|
+static int rtc_remove(struct fsl_mc_device *mc_dev)
|
|
+{
|
|
+ ptp_clock_unregister(clock);
|
|
+ dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
|
|
+ fsl_mc_portal_free(mc_dev->mc_io);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct fsl_mc_device_id rtc_match_id_table[] = {
|
|
+ {
|
|
+ .vendor = FSL_MC_VENDOR_FREESCALE,
|
|
+ .obj_type = "dprtc",
|
|
+ },
|
|
+ {}
|
|
+};
|
|
+
|
|
+static struct fsl_mc_driver rtc_drv = {
|
|
+ .driver = {
|
|
+ .name = KBUILD_MODNAME,
|
|
+ .owner = THIS_MODULE,
|
|
+ },
|
|
+ .probe = rtc_probe,
|
|
+ .remove = rtc_remove,
|
|
+ .match_id_table = rtc_match_id_table,
|
|
+};
|
|
+
|
|
+module_fsl_mc_driver(rtc_drv);
|
|
+
|
|
+MODULE_LICENSE("GPL");
|
|
+MODULE_DESCRIPTION("DPAA2 RTC (PTP 1588 clock) driver (prototype)");
|
|
|