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239 lines
7.1 KiB
239 lines
7.1 KiB
From a3555658ce5dd97df3dc225289b92800da9d38ba Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Mon, 14 Dec 2015 21:28:51 +0100
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Subject: [PATCH 506/513] net-next: mediatek: add support for rt3050
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Add support for SoCs from the rt3050 family. This include rt3050, rt3052,
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rt3352 and rt5350. These all have a builtin 5 port 100mbit switch. This patch
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includes rudimentary code to power up the switch. There are a lot of magic
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values that get written to the switch and the internal phys. These values
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come straight from the SDK driver and we do not know the meaning of most of
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them.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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Signed-off-by: Michael Lee <igvtee@gmail.com>
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---
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drivers/net/ethernet/mediatek/esw_rt3050.c | 18 +---
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drivers/net/ethernet/mediatek/soc_rt3050.c | 158 ++++++++++++++++++++++++++++
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2 files changed, 159 insertions(+), 17 deletions(-)
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create mode 100644 drivers/net/ethernet/mediatek/soc_rt3050.c
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--- a/drivers/net/ethernet/mediatek/esw_rt3050.c
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+++ b/drivers/net/ethernet/mediatek/esw_rt3050.c
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@@ -14,27 +14,11 @@
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#include <linux/module.h>
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#include <linux/kernel.h>
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-#include <linux/types.h>
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-#include <linux/dma-mapping.h>
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-#include <linux/init.h>
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-#include <linux/skbuff.h>
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-#include <linux/etherdevice.h>
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-#include <linux/ethtool.h>
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#include <linux/platform_device.h>
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-#include <linux/of_device.h>
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-#include <linux/clk.h>
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-#include <linux/of_net.h>
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-#include <linux/of_mdio.h>
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-
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#include <asm/mach-ralink/ralink_regs.h>
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#include "mtk_eth_soc.h"
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-#include <linux/ioport.h>
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-#include <linux/mii.h>
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-
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-#include <ralink_regs.h>
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-
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/* HW limitations for this switch:
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* - No large frame support (PKT_MAX_LEN at most 1536)
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* - Can't have untagged vlan and tagged vlan on one port at the same time,
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@@ -559,7 +543,7 @@ static irqreturn_t esw_interrupt(int irq
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static int esw_probe(struct platform_device *pdev)
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{
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- struct resource *res = platform_get_resource(p, IORESOURCE_MEM, 0);
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+ struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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struct device_node *np = pdev->dev.of_node;
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const __be32 *port_map, *reg_init;
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struct rt305x_esw *esw;
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@@ -629,12 +613,9 @@ static struct platform_driver esw_driver
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},
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};
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-int __init mtk_switch_init(void)
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-{
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- return platform_driver_register(&esw_driver);
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-}
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+module_platform_driver(esw_driver);
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-void mtk_switch_exit(void)
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-{
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- platform_driver_unregister(&esw_driver);
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-}
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+MODULE_LICENSE("GPL");
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+MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
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+MODULE_DESCRIPTION("Switch driver for RT305X SoC");
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+MODULE_VERSION(MTK_FE_DRV_VERSION);
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--- /dev/null
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+++ b/drivers/net/ethernet/mediatek/soc_rt3050.c
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@@ -0,0 +1,158 @@
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+/* This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; version 2 of the License
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * Copyright (C) 2009-2015 John Crispin <blogic@openwrt.org>
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+ * Copyright (C) 2009-2015 Felix Fietkau <nbd@nbd.name>
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+ * Copyright (C) 2013-2015 Michael Lee <igvtee@gmail.com>
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+ */
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+
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+#include <linux/module.h>
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+
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+#include <asm/mach-ralink/ralink_regs.h>
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+
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+#include "mtk_eth_soc.h"
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+#include "mdio_rt2880.h"
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+
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+#define RT305X_RESET_FE BIT(21)
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+#define RT305X_RESET_ESW BIT(23)
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+
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+static const u16 rt5350_reg_table[FE_REG_COUNT] = {
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+ [FE_REG_PDMA_GLO_CFG] = RT5350_PDMA_GLO_CFG,
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+ [FE_REG_PDMA_RST_CFG] = RT5350_PDMA_RST_CFG,
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+ [FE_REG_DLY_INT_CFG] = RT5350_DLY_INT_CFG,
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+ [FE_REG_TX_BASE_PTR0] = RT5350_TX_BASE_PTR0,
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+ [FE_REG_TX_MAX_CNT0] = RT5350_TX_MAX_CNT0,
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+ [FE_REG_TX_CTX_IDX0] = RT5350_TX_CTX_IDX0,
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+ [FE_REG_TX_DTX_IDX0] = RT5350_TX_DTX_IDX0,
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+ [FE_REG_RX_BASE_PTR0] = RT5350_RX_BASE_PTR0,
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+ [FE_REG_RX_MAX_CNT0] = RT5350_RX_MAX_CNT0,
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+ [FE_REG_RX_CALC_IDX0] = RT5350_RX_CALC_IDX0,
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+ [FE_REG_RX_DRX_IDX0] = RT5350_RX_DRX_IDX0,
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+ [FE_REG_FE_INT_ENABLE] = RT5350_FE_INT_ENABLE,
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+ [FE_REG_FE_INT_STATUS] = RT5350_FE_INT_STATUS,
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+ [FE_REG_FE_RST_GL] = 0,
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+ [FE_REG_FE_DMA_VID_BASE] = 0,
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+};
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+
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+static void rt305x_init_data(struct fe_soc_data *data,
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+ struct net_device *netdev)
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+{
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+ struct fe_priv *priv = netdev_priv(netdev);
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+
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+ priv->flags = FE_FLAG_PADDING_64B | FE_FLAG_PADDING_BUG |
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+ FE_FLAG_CALIBRATE_CLK | FE_FLAG_HAS_SWITCH;
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+ netdev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM |
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+ NETIF_F_RXCSUM | NETIF_F_HW_VLAN_CTAG_TX;
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+}
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+
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+static int rt3050_fwd_config(struct fe_priv *priv)
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+{
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+ int ret;
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+
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+ if (ralink_soc != RT305X_SOC_RT3052) {
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+ ret = fe_set_clock_cycle(priv);
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+ if (ret)
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+ return ret;
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+ }
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+
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+ fe_fwd_config(priv);
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+ if (ralink_soc != RT305X_SOC_RT3352)
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+ fe_w32(FE_PSE_FQFC_CFG_INIT, FE_PSE_FQ_CFG);
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+ fe_csum_config(priv);
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+
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+ return 0;
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+}
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+
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+static void rt305x_fe_reset(void)
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+{
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+ fe_reset(RT305X_RESET_FE);
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+}
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+
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+static void rt5350_init_data(struct fe_soc_data *data,
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+ struct net_device *netdev)
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+{
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+ struct fe_priv *priv = netdev_priv(netdev);
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+
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+ priv->flags = FE_FLAG_HAS_SWITCH;
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+ netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM;
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+}
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+
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+static void rt5350_set_mac(struct fe_priv *priv, unsigned char *mac)
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+{
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&priv->page_lock, flags);
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+ fe_w32((mac[0] << 8) | mac[1], RT5350_SDM_MAC_ADRH);
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+ fe_w32((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
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+ RT5350_SDM_MAC_ADRL);
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+ spin_unlock_irqrestore(&priv->page_lock, flags);
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+}
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+
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+static void rt5350_rxcsum_config(bool enable)
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+{
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+ if (enable)
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+ fe_w32(fe_r32(RT5350_SDM_CFG) | (RT5350_SDM_ICS_EN |
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+ RT5350_SDM_TCS_EN | RT5350_SDM_UCS_EN),
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+ RT5350_SDM_CFG);
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+ else
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+ fe_w32(fe_r32(RT5350_SDM_CFG) & ~(RT5350_SDM_ICS_EN |
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+ RT5350_SDM_TCS_EN | RT5350_SDM_UCS_EN),
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+ RT5350_SDM_CFG);
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+}
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+
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+static int rt5350_fwd_config(struct fe_priv *priv)
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+{
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+ struct net_device *dev = priv_netdev(priv);
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+
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+ rt5350_rxcsum_config((dev->features & NETIF_F_RXCSUM));
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+
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+ return 0;
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+}
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+
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+static void rt5350_tx_dma(struct fe_tx_dma *txd)
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+{
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+ txd->txd4 = 0;
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+}
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+
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+static void rt5350_fe_reset(void)
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+{
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+ fe_reset(RT305X_RESET_FE | RT305X_RESET_ESW);
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+}
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+
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+static struct fe_soc_data rt3050_data = {
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+ .init_data = rt305x_init_data,
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+ .reset_fe = rt305x_fe_reset,
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+ .fwd_config = rt3050_fwd_config,
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+ .pdma_glo_cfg = FE_PDMA_SIZE_8DWORDS,
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+ .checksum_bit = RX_DMA_L4VALID,
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+ .rx_int = FE_RX_DONE_INT,
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+ .tx_int = FE_TX_DONE_INT,
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+ .status_int = FE_CNT_GDM_AF,
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+};
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+
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+static struct fe_soc_data rt5350_data = {
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+ .init_data = rt5350_init_data,
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+ .reg_table = rt5350_reg_table,
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+ .reset_fe = rt5350_fe_reset,
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+ .set_mac = rt5350_set_mac,
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+ .fwd_config = rt5350_fwd_config,
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+ .tx_dma = rt5350_tx_dma,
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+ .pdma_glo_cfg = FE_PDMA_SIZE_8DWORDS,
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+ .checksum_bit = RX_DMA_L4VALID,
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+ .rx_int = RT5350_RX_DONE_INT,
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+ .tx_int = RT5350_TX_DONE_INT,
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+};
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+
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+const struct of_device_id of_fe_match[] = {
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+ { .compatible = "ralink,rt3050-eth", .data = &rt3050_data },
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+ { .compatible = "ralink,rt5350-eth", .data = &rt5350_data },
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+ {},
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+};
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+
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+MODULE_DEVICE_TABLE(of, of_fe_match);
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