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116 lines
2.8 KiB
116 lines
2.8 KiB
From: Matt Redfearn <matt.redfearn@imgtec.com>
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Date: Mon, 19 Dec 2016 14:20:59 +0000
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Subject: [PATCH] MIPS: Switch to the irq_stack in interrupts
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When enterring interrupt context via handle_int or except_vec_vi, switch
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to the irq_stack of the current CPU if it is not already in use.
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The current stack pointer is masked with the thread size and compared to
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the base or the irq stack. If it does not match then the stack pointer
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is set to the top of that stack, otherwise this is a nested irq being
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handled on the irq stack so the stack pointer should be left as it was.
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The in-use stack pointer is placed in the callee saved register s1. It
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will be saved to the stack when plat_irq_dispatch is invoked and can be
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restored once control returns here.
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Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
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---
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--- a/arch/mips/kernel/genex.S
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+++ b/arch/mips/kernel/genex.S
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@@ -187,9 +187,44 @@ NESTED(handle_int, PT_SIZE, sp)
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LONG_L s0, TI_REGS($28)
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LONG_S sp, TI_REGS($28)
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- PTR_LA ra, ret_from_irq
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- PTR_LA v0, plat_irq_dispatch
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- jr v0
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+
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+ /*
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+ * SAVE_ALL ensures we are using a valid kernel stack for the thread.
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+ * Check if we are already using the IRQ stack.
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+ */
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+ move s1, sp # Preserve the sp
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+
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+ /* Get IRQ stack for this CPU */
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+ ASM_CPUID_MFC0 k0, ASM_SMP_CPUID_REG
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+#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
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+ lui k1, %hi(irq_stack)
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+#else
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+ lui k1, %highest(irq_stack)
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+ daddiu k1, %higher(irq_stack)
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+ dsll k1, 16
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+ daddiu k1, %hi(irq_stack)
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+ dsll k1, 16
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+#endif
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+ LONG_SRL k0, SMP_CPUID_PTRSHIFT
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+ LONG_ADDU k1, k0
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+ LONG_L t0, %lo(irq_stack)(k1)
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+
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+ # Check if already on IRQ stack
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+ PTR_LI t1, ~(_THREAD_SIZE-1)
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+ and t1, t1, sp
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+ beq t0, t1, 2f
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+
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+ /* Switch to IRQ stack */
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+ li t1, _IRQ_STACK_SIZE
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+ PTR_ADD sp, t0, t1
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+
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+2:
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+ jal plat_irq_dispatch
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+
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+ /* Restore sp */
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+ move sp, s1
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+
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+ j ret_from_irq
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#ifdef CONFIG_CPU_MICROMIPS
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nop
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#endif
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@@ -262,8 +297,44 @@ NESTED(except_vec_vi_handler, 0, sp)
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LONG_L s0, TI_REGS($28)
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LONG_S sp, TI_REGS($28)
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- PTR_LA ra, ret_from_irq
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- jr v0
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+
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+ /*
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+ * SAVE_ALL ensures we are using a valid kernel stack for the thread.
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+ * Check if we are already using the IRQ stack.
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+ */
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+ move s1, sp # Preserve the sp
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+
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+ /* Get IRQ stack for this CPU */
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+ ASM_CPUID_MFC0 k0, ASM_SMP_CPUID_REG
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+#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
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+ lui k1, %hi(irq_stack)
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+#else
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+ lui k1, %highest(irq_stack)
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+ daddiu k1, %higher(irq_stack)
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+ dsll k1, 16
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+ daddiu k1, %hi(irq_stack)
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+ dsll k1, 16
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+#endif
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+ LONG_SRL k0, SMP_CPUID_PTRSHIFT
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+ LONG_ADDU k1, k0
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+ LONG_L t0, %lo(irq_stack)(k1)
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+
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+ # Check if already on IRQ stack
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+ PTR_LI t1, ~(_THREAD_SIZE-1)
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+ and t1, t1, sp
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+ beq t0, t1, 2f
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+
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+ /* Switch to IRQ stack */
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+ li t1, _IRQ_STACK_SIZE
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+ PTR_ADD sp, t0, t1
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+
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+2:
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+ jal plat_irq_dispatch
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+
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+ /* Restore sp */
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+ move sp, s1
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+
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+ j ret_from_irq
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END(except_vec_vi_handler)
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/*
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