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235 lines
6.1 KiB
235 lines
6.1 KiB
From 6e3a17190815c6aa4dc53c2cfe9125fb1154f187 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Sun, 24 Mar 2013 19:26:27 +0100
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Subject: [PATCH] rt2x00: rt2800lib: add channel configuration function for
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RF3853
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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drivers/net/wireless/rt2x00/rt2800lib.c | 208 +++++++++++++++++++++++++++++++
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1 file changed, 208 insertions(+)
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--- a/drivers/net/wireless/rt2x00/rt2800lib.c
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+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
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@@ -2625,6 +2625,211 @@ static void rt2800_config_channel_rf3053
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}
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}
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+static void rt2800_config_channel_rf3853(struct rt2x00_dev *rt2x00dev,
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+ struct ieee80211_conf *conf,
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+ struct rf_channel *rf,
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+ struct channel_info *info)
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+{
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+ u8 rfcsr;
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+ u8 bbp;
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+ u8 pwr1, pwr2, pwr3;
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+
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+ const bool txbf_enabled = false; /* TODO */
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+
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+ /* TODO: add band selection */
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+
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+ if (rf->channel <= 14)
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+ rt2800_rfcsr_write(rt2x00dev, 6, 0x40);
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+ else if (rf->channel < 132)
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+ rt2800_rfcsr_write(rt2x00dev, 6, 0x80);
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+ else
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+ rt2800_rfcsr_write(rt2x00dev, 6, 0x40);
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+
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+ rt2800_rfcsr_write(rt2x00dev, 8, rf->rf1);
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+ rt2800_rfcsr_write(rt2x00dev, 9, rf->rf3);
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+
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+ if (rf->channel <= 14)
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+ rt2800_rfcsr_write(rt2x00dev, 11, 0x46);
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+ else
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+ rt2800_rfcsr_write(rt2x00dev, 11, 0x48);
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+
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+ if (rf->channel <= 14)
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+ rt2800_rfcsr_write(rt2x00dev, 12, 0x1a);
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+ else
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+ rt2800_rfcsr_write(rt2x00dev, 12, 0x52);
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+
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+ rt2800_rfcsr_write(rt2x00dev, 13, 0x12);
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+
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+ rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
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+ rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 0);
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+ rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 0);
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+ rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 0);
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+ rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0);
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+ rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0);
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+ rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 0);
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+ rt2x00_set_field8(&rfcsr, RFCSR1_RF_BLOCK_EN, 1);
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+ rt2x00_set_field8(&rfcsr, RFCSR1_PLL_PD, 1);
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+
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+ switch (rt2x00dev->default_ant.tx_chain_num) {
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+ case 3:
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+ rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 1);
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+ /* fallthrough */
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+ case 2:
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+ rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 1);
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+ /* fallthrough */
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+ case 1:
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+ rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1);
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+ break;
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+ }
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+
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+ switch (rt2x00dev->default_ant.rx_chain_num) {
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+ case 3:
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+ rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 1);
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+ /* fallthrough */
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+ case 2:
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+ rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 1);
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+ /* fallthrough */
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+ case 1:
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+ rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1);
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+ break;
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+ }
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+ rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
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+
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+ rt2800_adjust_freq_offset(rt2x00dev);
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+
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+ rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr);
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+ if (!conf_is_ht40(conf))
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+ rfcsr &= ~(0x06);
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+ else
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+ rfcsr |= 0x06;
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+ rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
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+
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+ if (rf->channel <= 14)
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+ rt2800_rfcsr_write(rt2x00dev, 31, 0xa0);
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+ else
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+ rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
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+
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+ if (conf_is_ht40(conf))
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+ rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
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+ else
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+ rt2800_rfcsr_write(rt2x00dev, 32, 0xd8);
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+
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+ if (rf->channel <= 14)
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+ rt2800_rfcsr_write(rt2x00dev, 34, 0x3c);
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+ else
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+ rt2800_rfcsr_write(rt2x00dev, 34, 0x20);
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+
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+ /* loopback RF_BS */
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+ rt2800_rfcsr_read(rt2x00dev, 36, &rfcsr);
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+ if (rf->channel <= 14)
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+ rt2x00_set_field8(&rfcsr, RFCSR36_RF_BS, 1);
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+ else
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+ rt2x00_set_field8(&rfcsr, RFCSR36_RF_BS, 0);
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+ rt2800_rfcsr_write(rt2x00dev, 36, rfcsr);
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+
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+ if (rf->channel <= 14)
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+ rfcsr = 0x23;
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+ else if (rf->channel < 100)
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+ rfcsr = 0x36;
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+ else if (rf->channel < 132)
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+ rfcsr = 0x32;
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+ else
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+ rfcsr = 0x30;
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+
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+ if (txbf_enabled)
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+ rfcsr |= 0x40;
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+
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+ rt2800_rfcsr_write(rt2x00dev, 39, rfcsr);
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+
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+ if (rf->channel <= 14)
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+ rt2800_rfcsr_write(rt2x00dev, 44, 0x93);
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+ else
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+ rt2800_rfcsr_write(rt2x00dev, 44, 0x9b);
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+
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+ if (rf->channel <= 14)
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+ rfcsr = 0xbb;
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+ else if (rf->channel < 100)
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+ rfcsr = 0xeb;
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+ else if (rf->channel < 132)
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+ rfcsr = 0xb3;
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+ else
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+ rfcsr = 0x9b;
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+ rt2800_rfcsr_write(rt2x00dev, 45, rfcsr);
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+
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+ if (rf->channel <= 14)
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+ rfcsr = 0x8e;
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+ else
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+ rfcsr = 0x8a;
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+
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+ if (txbf_enabled)
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+ rfcsr |= 0x20;
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+
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+ rt2800_rfcsr_write(rt2x00dev, 49, rfcsr);
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+
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+ rt2800_rfcsr_write(rt2x00dev, 50, 0x86);
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+
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+ rt2800_rfcsr_read(rt2x00dev, 51, &rfcsr);
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+ if (rf->channel <= 14)
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+ rt2800_rfcsr_write(rt2x00dev, 51, 0x75);
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+ else
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+ rt2800_rfcsr_write(rt2x00dev, 51, 0x51);
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+
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+ rt2800_rfcsr_read(rt2x00dev, 52, &rfcsr);
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+ if (rf->channel <= 14)
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+ rt2800_rfcsr_write(rt2x00dev, 52, 0x45);
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+ else
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+ rt2800_rfcsr_write(rt2x00dev, 52, 0x05);
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+
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+ if (rf->channel <= 14) {
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+ pwr1 = info->default_power1 & 0x1f;
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+ pwr2 = info->default_power2 & 0x1f;
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+ pwr3 = info->default_power3 & 0x1f;
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+ } else {
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+ pwr1 = 0x48 | ((info->default_power1 & 0x18) << 1) |
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+ (info->default_power1 & 0x7);
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+ pwr2 = 0x48 | ((info->default_power2 & 0x18) << 1) |
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+ (info->default_power2 & 0x7);
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+ pwr3 = 0x48 | ((info->default_power3 & 0x18) << 1) |
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+ (info->default_power3 & 0x7);
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+ }
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+
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+ rt2800_rfcsr_write(rt2x00dev, 53, pwr1);
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+ rt2800_rfcsr_write(rt2x00dev, 54, pwr2);
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+ rt2800_rfcsr_write(rt2x00dev, 55, pwr3);
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+
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+ rt2x00_dbg(rt2x00dev, "Channel:%d, pwr1:%02x, pwr2:%02x, pwr3:%02x\n",
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+ rf->channel, pwr1, pwr2, pwr3);
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+
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+ bbp = (info->default_power1 >> 5) |
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+ ((info->default_power2 & 0xe0) >> 1);
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+ rt2800_bbp_write(rt2x00dev, 109, bbp);
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+
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+ rt2800_bbp_read(rt2x00dev, 110, &bbp);
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+ bbp &= 0x0f;
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+ bbp |= (info->default_power3 & 0xe0) >> 1;
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+ rt2800_bbp_write(rt2x00dev, 110, bbp);
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+
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+ rt2800_rfcsr_read(rt2x00dev, 57, &rfcsr);
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+ if (rf->channel <= 14)
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+ rt2800_rfcsr_write(rt2x00dev, 57, 0x6e);
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+ else
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+ rt2800_rfcsr_write(rt2x00dev, 57, 0x3e);
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+
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+ /* Enable RF tuning */
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+ rt2800_rfcsr_read(rt2x00dev, 3, &rfcsr);
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+ rt2x00_set_field8(&rfcsr, RFCSR3_VCOCAL_EN, 1);
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+ rt2800_rfcsr_write(rt2x00dev, 3, rfcsr);
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+
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+ udelay(2000);
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+
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+ rt2800_bbp_read(rt2x00dev, 49, &bbp);
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+ /* clear update flag */
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+ rt2800_bbp_write(rt2x00dev, 49, bbp & 0xfe);
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+ rt2800_bbp_write(rt2x00dev, 49, bbp);
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+
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+ /* TODO: add calibration for TxBF */
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+}
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+
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#define POWER_BOUND 0x27
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#define POWER_BOUND_5G 0x2b
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@@ -3237,6 +3442,9 @@ static void rt2800_config_channel(struct
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case RF3322:
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rt2800_config_channel_rf3322(rt2x00dev, conf, rf, info);
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break;
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+ case RF3853:
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+ rt2800_config_channel_rf3853(rt2x00dev, conf, rf, info);
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+ break;
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case RF3070:
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case RF5360:
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case RF5362:
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