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111 lines
2.2 KiB
111 lines
2.2 KiB
/*
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* BCM63XX specific implementation parts
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*
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* Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <stddef.h>
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#include "config.h"
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#include "cp0regdef.h"
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#define READREG(r) *(volatile unsigned int *)(r)
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#define WRITEREG(r,v) *(volatile unsigned int *)(r) = v
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#define UART_IR_REG 0x10
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#define UART_FIFO_REG 0x14
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unsigned long uart_base;
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static void wait_xfered(void)
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{
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unsigned int val;
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do {
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val = READREG(uart_base + UART_IR_REG);
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if (val & (1 << 5))
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break;
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} while (1);
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}
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void board_putc(int ch)
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{
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if (!uart_base)
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return;
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wait_xfered();
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WRITEREG(uart_base + UART_FIFO_REG, ch);
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wait_xfered();
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}
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#define PRID_IMP_BMIPS32_REV4 0x4000
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#define PRID_IMP_BMIPS32_REV8 0x8000
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#define PRID_IMP_BMIPS3300 0x9000
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#define PRID_IMP_BMIPS3300_ALT 0x9100
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#define PRID_IMP_BMIPS3300_BUG 0x0000
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#define PRID_IMP_BMIPS43XX 0xa000
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void board_init(void)
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{
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unsigned long prid, chipid, chipid_reg;
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prid = read_32bit_c0_register($15, 0);
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switch (prid & 0xff00) {
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case PRID_IMP_BMIPS32_REV4:
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case PRID_IMP_BMIPS32_REV8:
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case PRID_IMP_BMIPS3300_ALT:
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case PRID_IMP_BMIPS3300_BUG:
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chipid_reg = 0xfffe0000;
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break;
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case PRID_IMP_BMIPS3300:
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if ((prid & 0xff) >= 0x33)
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chipid_reg = 0xb0000000;
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else
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chipid_reg = 0xfffe0000;
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break;
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case PRID_IMP_BMIPS43XX:
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if ((prid & 0xff) == 0x04)
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chipid_reg = 0xfff8c000;
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else if ((prid & 0xff) == 0x70)
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return; /* FIXME: 0002a070 can be 6362 and 3380 */
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else if ((prid & 0xff) >= 0x30)
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chipid_reg = 0xb0000000;
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else
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chipid_reg = 0xfffe0000;
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break;
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default:
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return;
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}
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chipid = READREG(chipid_reg);
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switch (chipid >> 16) {
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case 0x3368:
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case 0x6318:
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case 0x6328:
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case 0x6358:
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case 0x6362:
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case 0x6368:
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case 0x6369:
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uart_base = chipid_reg + 0x100;
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break;
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case 0x6316:
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case 0x6326:
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uart_base = chipid_reg + 0x180;
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break;
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case 0x3380:
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uart_base = chipid_reg + 0x200;
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break;
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case 0x6338:
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case 0x6345:
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case 0x6348:
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uart_base = chipid_reg + 0x300;
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break;
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default:
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return;
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}
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}
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