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20 lines
580 B
20 lines
580 B
--- a/drivers/net/ethernet/freescale/gianfar.c
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+++ b/drivers/net/ethernet/freescale/gianfar.c
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@@ -1005,7 +1005,16 @@ static int gfar_probe(struct platform_de
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/* We need to delay at least 3 TX clocks */
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udelay(2);
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- tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
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+ if ((mfspr(SPRN_SVR) & 0xffff) >= 0x0011) {
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+ tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
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+ } else {
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+ /*
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+ * Do not enable flow control on chips earlier than rev 1.1,
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+ * because of the eTSEC27 erratum
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+ */
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+ tempval = 0;
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+ }
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+
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gfar_write(®s->maccfg1, tempval);
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/* Initialize MACCFG2. */
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