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199 lines
5.5 KiB
199 lines
5.5 KiB
From 9874eb6473865b9d975a7c3756099955e7454e21 Mon Sep 17 00:00:00 2001
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From: popcornmix <popcornmix@gmail.com>
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Date: Sun, 12 May 2013 12:24:19 +0100
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Subject: [PATCH] Main bcm2708/bcm2709 linux port
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Signed-off-by: popcornmix <popcornmix@gmail.com>
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Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
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bcm2709: Drop platform smp and timer init code
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irq-bcm2836 handles this through these functions:
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bcm2835_init_local_timer_frequency()
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bcm2836_arm_irqchip_smp_init()
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Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
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bcm270x: Use watchdog for reboot/poweroff
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The watchdog driver already has support for reboot/poweroff.
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Make use of this and remove the code from the platform files.
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Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
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---
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arch/arm/mach-bcm/Kconfig | 1 +
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arch/arm/mach-bcm/board_bcm2835.c | 17 +++++++++++++++++
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arch/arm/mm/proc-v6.S | 15 ++++++++++++---
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drivers/irqchip/irq-bcm2835.c | 7 ++++++-
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drivers/mailbox/bcm2835-mailbox.c | 18 ++++++++++++++++--
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5 files changed, 52 insertions(+), 6 deletions(-)
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--- a/arch/arm/mach-bcm/Kconfig
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+++ b/arch/arm/mach-bcm/Kconfig
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@@ -155,6 +155,7 @@ config ARCH_BCM2835
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select FIQ
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select PINCTRL
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select PINCTRL_BCM2835
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+ select MFD_SYSCON if ARCH_MULTI_V7
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help
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This enables support for the Broadcom BCM2835 and BCM2836 SoCs.
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This SoC is used in the Raspberry Pi and Roku 2 devices.
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--- a/arch/arm/mach-bcm/board_bcm2835.c
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+++ b/arch/arm/mach-bcm/board_bcm2835.c
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@@ -16,17 +16,21 @@
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#include <linux/irqchip.h>
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#include <linux/of_address.h>
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#include <linux/clk/bcm2835.h>
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+#include <linux/broadcom/vc_cma.h>
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#include <asm/system_info.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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+#include <linux/dma-mapping.h>
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+
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static void __init bcm2835_init(void)
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{
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struct device_node *np = of_find_node_by_path("/system");
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u32 val;
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u64 val64;
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+ vc_cma_early_init();
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bcm2835_init_clocks();
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if (!of_property_read_u32(np, "linux,revision", &val))
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@@ -35,6 +39,17 @@ static void __init bcm2835_init(void)
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system_serial_low = val64;
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}
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+static void __init bcm2835_init_early(void)
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+{
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+ /* dwc_otg needs this for bounce buffers on non-aligned transfers */
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+ init_dma_coherent_pool_size(SZ_1M);
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+}
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+
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+static void __init bcm2835_board_reserve(void)
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+{
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+ vc_cma_reserve();
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+}
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+
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static const char * const bcm2835_compat[] = {
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#ifdef CONFIG_ARCH_MULTI_V6
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"brcm,bcm2835",
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@@ -47,5 +62,7 @@ static const char * const bcm2835_compat
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DT_MACHINE_START(BCM2835, "BCM2835")
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.init_machine = bcm2835_init,
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+ .reserve = bcm2835_board_reserve,
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+ .init_early = bcm2835_init_early,
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.dt_compat = bcm2835_compat
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MACHINE_END
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--- a/arch/arm/mm/proc-v6.S
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+++ b/arch/arm/mm/proc-v6.S
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@@ -73,10 +73,19 @@ ENDPROC(cpu_v6_reset)
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*
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* IRQs are already disabled.
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*/
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+
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+/* See jira SW-5991 for details of this workaround */
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ENTRY(cpu_v6_do_idle)
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- mov r1, #0
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- mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
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- mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt
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+ .align 5
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+ mov r1, #2
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+1: subs r1, #1
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+ nop
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+ mcreq p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
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+ mcreq p15, 0, r1, c7, c0, 4 @ wait for interrupt
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+ nop
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+ nop
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+ nop
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+ bne 1b
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ret lr
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ENTRY(cpu_v6_dcache_clean_area)
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--- a/drivers/irqchip/irq-bcm2835.c
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+++ b/drivers/irqchip/irq-bcm2835.c
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@@ -54,7 +54,9 @@
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#include <linux/regmap.h>
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#include <asm/exception.h>
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+#ifndef CONFIG_ARM64
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#include <asm/mach/irq.h>
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+#endif
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/* Put the bank and irq (32 bits) into the hwirq */
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#define MAKE_HWIRQ(b, n) (((b) << 5) | (n))
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@@ -82,6 +84,7 @@
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#define NR_BANKS 3
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#define IRQS_PER_BANK 32
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#define NUMBER_IRQS MAKE_HWIRQ(NR_BANKS, 0)
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+#undef FIQ_START
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#define FIQ_START (NR_IRQS_BANK0 + MAKE_HWIRQ(NR_BANKS - 1, 0))
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static const int reg_pending[] __initconst = { 0x00, 0x04, 0x08 };
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@@ -256,10 +259,12 @@ static int __init armctrl_of_init(struct
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MAKE_HWIRQ(b, i) + NUMBER_IRQS);
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BUG_ON(irq <= 0);
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irq_set_chip(irq, &armctrl_chip);
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- set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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+ irq_set_probe(irq);
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}
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}
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+#ifndef CONFIG_ARM64
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init_FIQ(FIQ_START);
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+#endif
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return 0;
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}
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--- a/drivers/mailbox/bcm2835-mailbox.c
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+++ b/drivers/mailbox/bcm2835-mailbox.c
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@@ -51,12 +51,15 @@
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#define MAIL1_WRT (ARM_0_MAIL1 + 0x00)
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#define MAIL1_STA (ARM_0_MAIL1 + 0x18)
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+/* On ARCH_BCM270x these come through <linux/interrupt.h> (arm_control.h ) */
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+#ifndef ARM_MS_FULL
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/* Status register: FIFO state. */
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#define ARM_MS_FULL BIT(31)
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#define ARM_MS_EMPTY BIT(30)
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/* Configuration register: Enable interrupts. */
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#define ARM_MC_IHAVEDATAIRQEN BIT(0)
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+#endif
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struct bcm2835_mbox {
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void __iomem *regs;
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@@ -151,7 +154,7 @@ static int bcm2835_mbox_probe(struct pla
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return -ENOMEM;
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spin_lock_init(&mbox->lock);
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- ret = devm_request_irq(dev, irq_of_parse_and_map(dev->of_node, 0),
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+ ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
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bcm2835_mbox_irq, 0, dev_name(dev), mbox);
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if (ret) {
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dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n",
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@@ -209,7 +212,18 @@ static struct platform_driver bcm2835_mb
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.probe = bcm2835_mbox_probe,
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.remove = bcm2835_mbox_remove,
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};
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-module_platform_driver(bcm2835_mbox_driver);
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+
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+static int __init bcm2835_mbox_init(void)
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+{
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+ return platform_driver_register(&bcm2835_mbox_driver);
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+}
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+arch_initcall(bcm2835_mbox_init);
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+
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+static void __init bcm2835_mbox_exit(void)
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+{
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+ platform_driver_unregister(&bcm2835_mbox_driver);
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+}
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+module_exit(bcm2835_mbox_exit);
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MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
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MODULE_DESCRIPTION("BCM2835 mailbox IPC driver");
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