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53 lines
1.7 KiB
53 lines
1.7 KiB
--- a/arch/arm/mach-cns3xxx/pcie.c
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+++ b/arch/arm/mach-cns3xxx/pcie.c
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@@ -71,7 +71,7 @@ static void __iomem *cns3xxx_pci_cfg_bas
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void __iomem *base;
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/* If there is no link, just show the CNS PCI bridge. */
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- if (!cnspci->linked && (busno > 0 || slot > 0))
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+ if (!cnspci->linked && (busno > 0))
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return NULL;
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/*
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@@ -80,15 +80,19 @@ static void __iomem *cns3xxx_pci_cfg_bas
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* the first device on the same bus as the CNS PCI bridge.
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*/
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if (busno == 0) {
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- if (slot > 1)
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+ type = CNS3XXX_HOST_TYPE;
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+ if (devfn)
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+ return NULL;
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+ } else if (busno == 1) {
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+ type = CNS3XXX_CFG0_TYPE;
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+ if (slot)
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return NULL;
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- type = slot;
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} else {
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type = CNS3XXX_CFG1_TYPE;
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}
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base = (void __iomem *)cnspci->cfg_bases[type].virtual;
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- offset = ((busno & 0xf) << 20) | (devfn << 12) | (where & 0xffc);
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+ offset = (devfn << 12) | (where & 0xffc);
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return base + offset;
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}
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@@ -256,7 +260,7 @@ static struct pci_ops cns3xxx_pcie_ops =
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static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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struct cns3xxx_pcie *cnspci = pdev_to_cnspci(dev);
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- int irq = cnspci->irqs[slot+pin-1];
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+ int irq = cnspci->irqs[!!dev->bus->number+pin-1];
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pr_info("PCIe map irq: %04d:%02x:%02x.%02x slot %d, pin %d, irq: %d\n",
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pci_domain_nr(dev->bus), dev->bus->number, PCI_SLOT(dev->devfn),
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@@ -434,7 +438,8 @@ static void __init cns3xxx_pcie_hw_init(
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return;
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/* Set Device Max_Read_Request_Size to 128 byte */
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- devfn = PCI_DEVFN(1, 0);
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+ bus.number = 1;
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+ devfn = PCI_DEVFN(0, 0);
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pos = pci_bus_find_capability(&bus, devfn, PCI_CAP_ID_EXP);
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pci_bus_read_config_word(&bus, devfn, pos + PCI_EXP_DEVCTL, &dc);
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dc &= ~(0x3 << 12); /* Clear Device Control Register [14:12] */
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