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461 lines
12 KiB
461 lines
12 KiB
From dd77db4143290689d3a5e1ec61627233d0711b66 Mon Sep 17 00:00:00 2001
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From: Stephen Boyd <sboyd@codeaurora.org>
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Date: Fri, 30 May 2014 16:36:11 -0700
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Subject: [PATCH] FROMLIST: cpufreq: Add a cpufreq-krait based on cpufreq-cpu0
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Krait processors have individual clocks for each CPU that can
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scale independently from one another. cpufreq-cpu0 is fairly
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close to this, but assumes that there is only one clock for all
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CPUs. Add a driver to support the Krait configuration.
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TODO: Merge into cpufreq-cpu0? Or make generic?
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Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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---
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drivers/cpufreq/Kconfig | 13 +++
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drivers/cpufreq/Makefile | 1 +
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drivers/cpufreq/cpufreq-krait.c | 190 ++++++++++++++++++++++++++++++++++++++++
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3 files changed, 204 insertions(+)
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create mode 100644 drivers/cpufreq/cpufreq-krait.c
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--- a/drivers/cpufreq/Kconfig
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+++ b/drivers/cpufreq/Kconfig
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@@ -198,6 +198,19 @@
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If in doubt, say N.
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+config GENERIC_CPUFREQ_KRAIT
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+ tristate "Krait cpufreq driver"
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+ depends on HAVE_CLK && OF
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+ # if CPU_THERMAL is on and THERMAL=m, CPU0 cannot be =y:
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+ depends on !CPU_THERMAL || THERMAL
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+ select PM_OPP
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+ help
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+ This adds a generic cpufreq driver for CPU0 frequency management.
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+ It supports both uniprocessor (UP) and symmetric multiprocessor (SMP)
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+ systems which share clock and voltage across all CPUs.
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+
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+ If in doubt, say N.
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+
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if X86
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source "drivers/cpufreq/Kconfig.x86"
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endif
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--- a/drivers/cpufreq/Makefile
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+++ b/drivers/cpufreq/Makefile
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@@ -13,6 +13,7 @@
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obj-$(CONFIG_CPU_FREQ_GOV_COMMON) += cpufreq_governor.o
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obj-$(CONFIG_CPUFREQ_DT) += cpufreq-dt.o
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+obj-$(CONFIG_GENERIC_CPUFREQ_KRAIT) += cpufreq-krait.o
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##################################################################################
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# x86 drivers.
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--- /dev/null
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+++ b/drivers/cpufreq/cpufreq-krait.c
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@@ -0,0 +1,390 @@
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+/*
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+ * Copyright (C) 2012 Freescale Semiconductor, Inc.
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+ * Copyright (c) 2014, The Linux Foundation. All rights reserved.
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+ *
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+ * The OPP code in function krait_set_target() is reused from
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+ * drivers/cpufreq/omap-cpufreq.c
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#include <linux/clk.h>
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+#include <linux/cpu.h>
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+#include <linux/cpu_cooling.h>
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+#include <linux/cpufreq.h>
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+#include <linux/cpumask.h>
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+#include <linux/err.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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+#include <linux/pm_opp.h>
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+#include <linux/platform_device.h>
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+#include <linux/regulator/consumer.h>
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+#include <linux/slab.h>
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+#include <linux/thermal.h>
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+
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+static unsigned int transition_latency;
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+static unsigned int voltage_tolerance; /* in percentage */
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+
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+static struct device *cpu_dev;
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+static DEFINE_PER_CPU(struct clk *, krait_cpu_clks);
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+static DEFINE_PER_CPU(struct regulator *, krait_supply_core);
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+static struct cpufreq_frequency_table *freq_table;
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+static struct thermal_cooling_device *cdev;
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+
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+struct cache_points {
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+ unsigned long cache_freq;
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+ unsigned int cache_volt;
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+ unsigned long cpu_freq;
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+};
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+
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+static struct regulator *krait_l2_reg;
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+static struct clk *krait_l2_clk;
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+static struct cache_points *krait_l2_points;
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+static int nr_krait_l2_points;
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+
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+static int krait_parse_cache_points(struct device *dev,
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+ struct device_node *of_node)
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+{
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+ const struct property *prop;
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+ const __be32 *val;
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+ int nr, i;
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+
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+ prop = of_find_property(of_node, "cache-points-kHz", NULL);
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+ if (!prop)
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+ return -ENODEV;
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+ if (!prop->value)
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+ return -ENODATA;
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+
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+ /*
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+ * Each OPP is a set of tuples consisting of frequency and
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+ * cpu-frequency like <freq-kHz volt-uV freq-kHz>.
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+ */
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+ nr = prop->length / sizeof(u32);
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+ if (nr % 3) {
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+ dev_err(dev, "%s: Invalid cache points\n", __func__);
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+ return -EINVAL;
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+ }
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+ nr /= 3;
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+
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+ krait_l2_points = devm_kcalloc(dev, nr, sizeof(*krait_l2_points),
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+ GFP_KERNEL);
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+ if (!krait_l2_points)
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+ return -ENOMEM;
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+ nr_krait_l2_points = nr;
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+
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+ for (i = 0, val = prop->value; i < nr; i++) {
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+ unsigned long cache_freq = be32_to_cpup(val++) * 1000;
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+ unsigned int cache_volt = be32_to_cpup(val++);
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+ unsigned long cpu_freq = be32_to_cpup(val++) * 1000;
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+
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+ krait_l2_points[i].cache_freq = cache_freq;
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+ krait_l2_points[i].cache_volt = cache_volt;
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+ krait_l2_points[i].cpu_freq = cpu_freq;
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+ }
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+
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+ return 0;
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+}
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+
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+static int krait_set_target(struct cpufreq_policy *policy, unsigned int index)
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+{
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+ struct dev_pm_opp *opp;
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+ unsigned long volt = 0, volt_old = 0, tol = 0;
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+ unsigned long freq, max_cpu_freq = 0;
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+ unsigned int old_freq, new_freq;
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+ long freq_Hz, freq_exact;
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+ int ret, i;
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+ struct clk *cpu_clk;
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+ struct regulator *core;
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+ unsigned int cpu;
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+
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+ cpu_clk = per_cpu(krait_cpu_clks, policy->cpu);
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+
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+ freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
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+ if (freq_Hz <= 0)
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+ freq_Hz = freq_table[index].frequency * 1000;
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+
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+ freq_exact = freq_Hz;
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+ new_freq = freq_Hz / 1000;
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+ old_freq = clk_get_rate(cpu_clk) / 1000;
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+
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+ core = per_cpu(krait_supply_core, policy->cpu);
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+
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+ rcu_read_lock();
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+ opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
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+ if (IS_ERR(opp)) {
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+ rcu_read_unlock();
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+ pr_err("failed to find OPP for %ld\n", freq_Hz);
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+ return PTR_ERR(opp);
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+ }
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+ volt = dev_pm_opp_get_voltage(opp);
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+ rcu_read_unlock();
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+ tol = volt * voltage_tolerance / 100;
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+ volt_old = regulator_get_voltage(core);
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+
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+ pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
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+ old_freq / 1000, volt_old ? volt_old / 1000 : -1,
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+ new_freq / 1000, volt ? volt / 1000 : -1);
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+
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+ /* scaling up? scale voltage before frequency */
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+ if (new_freq > old_freq) {
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+ ret = regulator_set_voltage_tol(core, volt, tol);
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+ if (ret) {
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+ pr_err("failed to scale voltage up: %d\n", ret);
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+ return ret;
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+ }
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+ }
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+
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+ ret = clk_set_rate(cpu_clk, freq_exact);
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+ if (ret) {
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+ pr_err("failed to set clock rate: %d\n", ret);
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+ return ret;
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+ }
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+
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+ /* scaling down? scale voltage after frequency */
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+ if (new_freq < old_freq) {
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+ ret = regulator_set_voltage_tol(core, volt, tol);
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+ if (ret) {
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+ pr_err("failed to scale voltage down: %d\n", ret);
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+ clk_set_rate(cpu_clk, old_freq * 1000);
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+ }
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+ }
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+
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+ for_each_possible_cpu(cpu) {
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+ freq = clk_get_rate(per_cpu(krait_cpu_clks, cpu));
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+ max_cpu_freq = max(max_cpu_freq, freq);
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+ }
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+
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+ for (i = 0; i < nr_krait_l2_points; i++) {
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+ if (max_cpu_freq >= krait_l2_points[i].cpu_freq) {
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+ if (krait_l2_reg) {
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+ ret = regulator_set_voltage_tol(krait_l2_reg,
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+ krait_l2_points[i].cache_volt,
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+ tol);
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+ if (ret) {
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+ pr_err("failed to scale l2 voltage: %d\n",
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+ ret);
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+ }
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+ }
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+ ret = clk_set_rate(krait_l2_clk,
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+ krait_l2_points[i].cache_freq);
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+ if (ret)
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+ pr_err("failed to scale l2 clk: %d\n", ret);
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+ break;
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+ }
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+
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+ }
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+
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+ return ret;
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+}
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+
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+static int krait_cpufreq_init(struct cpufreq_policy *policy)
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+{
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+ int ret;
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+
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+ policy->clk = per_cpu(krait_cpu_clks, policy->cpu);
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+
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+ ret = cpufreq_table_validate_and_show(policy, freq_table);
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+ if (ret) {
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+ pr_err("%s: invalid frequency table: %d\n", __func__, ret);
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+ return ret;
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+ }
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+
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+ policy->cpuinfo.transition_latency = transition_latency;
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+
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+ return 0;
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+}
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+
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+static struct cpufreq_driver krait_cpufreq_driver = {
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+ .flags = CPUFREQ_STICKY,
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+ .verify = cpufreq_generic_frequency_table_verify,
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+ .target_index = krait_set_target,
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+ .get = cpufreq_generic_get,
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+ .init = krait_cpufreq_init,
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+ .name = "generic_krait",
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+ .attr = cpufreq_generic_attr,
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+};
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+
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+static int krait_cpufreq_probe(struct platform_device *pdev)
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+{
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+ struct device_node *np, *cache;
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+ int ret, i;
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+ unsigned int cpu;
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+ struct device *dev;
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+ struct clk *clk;
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+ struct regulator *core;
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+ unsigned long freq_Hz, freq, max_cpu_freq = 0;
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+ struct dev_pm_opp *opp;
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+ unsigned long volt, tol;
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+
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+ cpu_dev = get_cpu_device(0);
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+ if (!cpu_dev) {
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+ pr_err("failed to get krait device\n");
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+ return -ENODEV;
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+ }
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+
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+ np = of_node_get(cpu_dev->of_node);
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+ if (!np) {
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+ pr_err("failed to find krait node\n");
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+ return -ENOENT;
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+ }
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+
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+ ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
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+ if (ret) {
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+ pr_err("failed to init cpufreq table: %d\n", ret);
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+ goto out_put_node;
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+ }
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+
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+ of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
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+
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+ if (of_property_read_u32(np, "clock-latency", &transition_latency))
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+ transition_latency = CPUFREQ_ETERNAL;
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+
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+ cache = of_find_next_cache_node(np);
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+ if (cache) {
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+ struct device_node *vdd;
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+
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+ vdd = of_parse_phandle(cache, "vdd_dig-supply", 0);
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+ if (vdd) {
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+ krait_l2_reg = regulator_get(NULL, vdd->name);
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+ if (IS_ERR(krait_l2_reg)) {
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+ pr_warn("failed to get l2 vdd_dig supply\n");
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+ krait_l2_reg = NULL;
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+ }
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+ of_node_put(vdd);
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+ }
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+
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+ krait_l2_clk = of_clk_get(cache, 0);
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+ if (!IS_ERR(krait_l2_clk)) {
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+ ret = krait_parse_cache_points(&pdev->dev, cache);
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+ if (ret)
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+ clk_put(krait_l2_clk);
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+ }
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+ if (IS_ERR(krait_l2_clk) || ret)
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+ krait_l2_clk = NULL;
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+ }
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+
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+ for_each_possible_cpu(cpu) {
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+ dev = get_cpu_device(cpu);
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+ if (!dev) {
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+ pr_err("failed to get krait device\n");
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+ ret = -ENOENT;
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+ goto out_free_table;
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+ }
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+ per_cpu(krait_cpu_clks, cpu) = clk = devm_clk_get(dev, NULL);
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+ if (IS_ERR(clk)) {
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+ ret = PTR_ERR(clk);
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+ goto out_free_table;
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+ }
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+ core = devm_regulator_get(dev, "core");
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+ if (IS_ERR(core)) {
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+ pr_debug("failed to get core regulator\n");
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+ ret = PTR_ERR(core);
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+ goto out_free_table;
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+ }
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+ per_cpu(krait_supply_core, cpu) = core;
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+
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+ freq = freq_Hz = clk_get_rate(clk);
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+
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+ rcu_read_lock();
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+ opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
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+ if (IS_ERR(opp)) {
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+ rcu_read_unlock();
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+ pr_err("failed to find OPP for %ld\n", freq_Hz);
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+ ret = PTR_ERR(opp);
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+ goto out_free_table;
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+ }
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+ volt = dev_pm_opp_get_voltage(opp);
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+ rcu_read_unlock();
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+
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+ tol = volt * voltage_tolerance / 100;
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+ ret = regulator_set_voltage_tol(core, volt, tol);
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+ if (ret) {
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+ pr_err("failed to scale voltage up: %d\n", ret);
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+ goto out_free_table;
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+ }
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+ ret = regulator_enable(core);
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+ if (ret) {
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+ pr_err("failed to enable regulator: %d\n", ret);
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+ goto out_free_table;
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+ }
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+ max_cpu_freq = max(max_cpu_freq, freq);
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+ }
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+
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+ for (i = 0; i < nr_krait_l2_points; i++) {
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+ if (max_cpu_freq >= krait_l2_points[i].cpu_freq) {
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+ if (krait_l2_reg) {
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+ ret = regulator_set_voltage_tol(krait_l2_reg,
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+ krait_l2_points[i].cache_volt,
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+ tol);
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+ if (ret)
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+ pr_err("failed to scale l2 voltage: %d\n",
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+ ret);
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+ ret = regulator_enable(krait_l2_reg);
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+ if (ret)
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+ pr_err("failed to enable l2 voltage: %d\n",
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+ ret);
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+ }
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+ break;
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+ }
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+
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+ }
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+
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+ ret = cpufreq_register_driver(&krait_cpufreq_driver);
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+ if (ret) {
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+ pr_err("failed register driver: %d\n", ret);
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+ goto out_free_table;
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+ }
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+ of_node_put(np);
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+
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+ /*
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+ * For now, just loading the cooling device;
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+ * thermal DT code takes care of matching them.
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+ */
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+ for_each_possible_cpu(cpu) {
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+ dev = get_cpu_device(cpu);
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+ np = of_node_get(dev->of_node);
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+ if (of_find_property(np, "#cooling-cells", NULL)) {
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+ cdev = of_cpufreq_cooling_register(np, cpumask_of(cpu));
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+ if (IS_ERR(cdev))
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+ pr_err("running cpufreq without cooling device: %ld\n",
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+ PTR_ERR(cdev));
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+ }
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+ of_node_put(np);
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+ }
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+
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+ return 0;
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+
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+out_free_table:
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+ regulator_put(krait_l2_reg);
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+ clk_put(krait_l2_clk);
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+ dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
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+out_put_node:
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+ of_node_put(np);
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+ return ret;
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+}
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+
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+static int krait_cpufreq_remove(struct platform_device *pdev)
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+{
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+ cpufreq_cooling_unregister(cdev);
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+ cpufreq_unregister_driver(&krait_cpufreq_driver);
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+ dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
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+ clk_put(krait_l2_clk);
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+ regulator_put(krait_l2_reg);
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+
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+ return 0;
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+}
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+
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+static struct platform_driver krait_cpufreq_platdrv = {
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+ .driver = {
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+ .name = "cpufreq-krait",
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+ .owner = THIS_MODULE,
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+ },
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+ .probe = krait_cpufreq_probe,
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+ .remove = krait_cpufreq_remove,
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+};
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+module_platform_driver(krait_cpufreq_platdrv);
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+
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+MODULE_DESCRIPTION("Krait CPUfreq driver");
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+MODULE_LICENSE("GPL v2");
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--- a/drivers/cpufreq/qcom-cpufreq.c
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+++ b/drivers/cpufreq/qcom-cpufreq.c
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|
@@ -168,11 +168,8 @@
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|
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static int __init qcom_cpufreq_driver_init(void)
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{
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- struct cpufreq_dt_platform_data pdata = { .independent_clocks = true };
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struct platform_device_info devinfo = {
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- .name = "cpufreq-dt",
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- .data = &pdata,
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- .size_data = sizeof(pdata),
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+ .name = "cpufreq-krait",
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};
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struct device *cpu_dev;
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struct device_node *np;
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