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43 lines
1.6 KiB
43 lines
1.6 KiB
From 1b02e59087d3de3953d3fa0536356e3e137bf74b Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <f.fainelli@gmail.com>
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Date: Tue, 28 Jul 2015 19:24:24 -0700
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Subject: [PATCH] Revert "MIPS: BCM63xx: Provide a plat_post_dma_flush hook"
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This reverts commit 3cf29543413207d3ab1c3f62a88c09bb46f2264e ("MIPS:
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BCM63xx: Provide a plat_post_dma_flush hook") since this commit was
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found to prevent BCM6358 (early BMIPS4350 cores) and some BCM6368
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(BMIPS4380 cores) from booting reliably.
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Alvaro was able to track this down to an issue specifically located to
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devices that use the second thread (TP1) when booting. Since BCM63xx did
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not have a need for plat_post_dma_flush() hook before, let's just keep
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things the way they were.
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CC: stable@vger.kernel.org
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CC: Kevin Cernekee <cernekee@gmail.com>
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CC: Nicolas Schichan <nschichan@freebox.fr>
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Reported-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Reported-by: Jonas Gorski <jogo@openwrt.org>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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arch/mips/include/asm/mach-bcm63xx/dma-coherence.h | 10 ----------
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1 file changed, 10 deletions(-)
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delete mode 100644 arch/mips/include/asm/mach-bcm63xx/dma-coherence.h
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--- a/arch/mips/include/asm/mach-bcm63xx/dma-coherence.h
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+++ /dev/null
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@@ -1,10 +0,0 @@
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-#ifndef __ASM_MACH_BCM63XX_DMA_COHERENCE_H
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-#define __ASM_MACH_BCM63XX_DMA_COHERENCE_H
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-
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-#include <asm/bmips.h>
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-
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-#define plat_post_dma_flush bmips_post_dma_flush
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-
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-#include <asm/mach-generic/dma-coherence.h>
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-
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-#endif /* __ASM_MACH_BCM63XX_DMA_COHERENCE_H */
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