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69 lines
1.9 KiB
69 lines
1.9 KiB
1. Made the connection between CNS3xxx SOCs(ARCH_CNS3xxx) and MPcore watchdog
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since the CNS3xxx SOCs have ARM11 MPcore CPU.
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2. Enable mpcore_watchdog option as module to default configuration at
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arch/arm/configs/cns3420vb_defconfig.
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Signed-off-by: Tommy Lin <tommy.lin@caviumnetworks.com>
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---
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arch/arm/Kconfig | 1 +
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arch/arm/configs/cns3420vb_defconfig | 2 ++
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arch/arm/mach-cns3xxx/cns3420vb.c | 22 ++++++++++++++++++++++
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3 files changed, 25 insertions(+), 0 deletions(-)
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--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -372,6 +372,7 @@ config ARCH_CNS3XXX
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select MIGHT_HAVE_CACHE_L2X0
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select MIGHT_HAVE_PCI
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select PCI_DOMAINS if PCI
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+ select HAVE_ARM_TWD
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help
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Support for Cavium Networks CNS3XXX platform.
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--- a/arch/arm/configs/cns3420vb_defconfig
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+++ b/arch/arm/configs/cns3420vb_defconfig
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@@ -53,6 +53,8 @@ CONFIG_LEGACY_PTY_COUNT=16
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# CONFIG_HW_RANDOM is not set
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# CONFIG_HWMON is not set
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# CONFIG_VGA_CONSOLE is not set
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+CONFIG_WATCHDOG=y
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+CONFIG_MPCORE_WATCHDOG=m
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# CONFIG_HID_SUPPORT is not set
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# CONFIG_USB_SUPPORT is not set
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CONFIG_MMC=y
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--- a/arch/arm/mach-cns3xxx/cns3420vb.c
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+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
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@@ -159,10 +159,32 @@ static struct platform_device cns3xxx_us
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},
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};
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+/* Watchdog */
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+static struct resource cns3xxx_watchdog_resources[] = {
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+ [0] = {
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+ .start = CNS3XXX_TC11MP_TWD_BASE,
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+ .end = CNS3XXX_TC11MP_TWD_BASE + PAGE_SIZE - 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .start = IRQ_LOCALWDOG,
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+ .end = IRQ_LOCALWDOG,
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+ .flags = IORESOURCE_IRQ,
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+ }
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+};
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+
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+static struct platform_device cns3xxx_watchdog_device = {
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+ .name = "mpcore_wdt",
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+ .id = -1,
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+ .num_resources = ARRAY_SIZE(cns3xxx_watchdog_resources),
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+ .resource = cns3xxx_watchdog_resources,
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+};
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+
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/*
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* Initialization
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*/
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static struct platform_device *cns3420_pdevs[] __initdata = {
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+ &cns3xxx_watchdog_device,
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&cns3420_nor_pdev,
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&cns3xxx_usb_ehci_device,
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&cns3xxx_usb_ohci_device,
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