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165 lines
2.5 KiB
165 lines
2.5 KiB
/dts-v1/;
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "iodata,wn-ax1167gr", "mediatek,mt7621-soc";
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model = "I-O DATA WN-AX1167GR";
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aliases {
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led-status = &led_power;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x4000000>;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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gpio-leds {
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compatible = "gpio-leds";
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led_power: power {
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label = "wn-ax1167gr:green:power";
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gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "wn-ax1167gr:green:wps";
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gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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reset {
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label = "reset";
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gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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auto {
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label = "auto";
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gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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linux,input-type = <EV_SW>;
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};
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custom {
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label = "custom";
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gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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linux,input-type = <EV_SW>;
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};
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};
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};
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&spi0 {
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status = "okay";
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m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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m25p,chunked-io = <32>;
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partition@0 {
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label = "Bootloader";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "Config";
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reg = <0x30000 0x10000>;
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read-only;
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};
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Factory: partition@40000 {
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label = "Factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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iNIC_rf: partition@50000 {
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label = "iNIC_rf";
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reg = <0x50000 0x10000>;
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read-only;
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};
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partition@60000 {
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label = "firmware";
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reg = <0x60000 0xf30000>;
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};
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partition@f90000 {
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label = "Key";
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reg = <0xf90000 0x10000>;
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read-only;
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};
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partition@fa0000 {
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label = "backup";
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reg = <0xfa0000 0x10000>;
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read-only;
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};
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partition@fb0000 {
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label = "storage";
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reg = <0xfb0000 0x50000>;
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read-only;
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};
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};
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};
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ðernet {
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mtd-mac-address = <&iNIC_rf 0x4>;
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "uart2", "uart3", "jtag";
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ralink,function = "gpio";
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&iNIC_rf 0x0>;
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};
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};
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&pcie1 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&Factory 0x0>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&xhci {
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status = "disabled";
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};
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