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199 lines
5.3 KiB
199 lines
5.3 KiB
From 24025a2dcf1248079dd3019fac6ed955252d277f Mon Sep 17 00:00:00 2001
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From: Imre Kaloz <kaloz@openwrt.org>
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Date: Mon, 14 Jul 2008 21:56:34 +0200
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Subject: [PATCH] Add support for the Compex WP18 / NP18A boards
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Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
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---
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--- a/arch/arm/mach-ixp4xx/Kconfig
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+++ b/arch/arm/mach-ixp4xx/Kconfig
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@@ -85,6 +85,14 @@ config MACH_SIDEWINDER
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Engineering Sidewinder board. For more information on this
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platform, see http://www.adiengineering.com
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+config MACH_COMPEXWP18
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+ bool "Compex WP18 / NP18A"
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+ select PCI
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+ help
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+ Say 'Y' here if you want your kernel to support Compex'
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+ WP18 or NP18A boards. For more information on this
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+ platform, see http://www.compex.com.sg/home/OEM/product_ap.htm
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+
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config ARCH_IXDP425
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bool "IXDP425"
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help
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--- a/arch/arm/mach-ixp4xx/Makefile
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+++ b/arch/arm/mach-ixp4xx/Makefile
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@@ -21,6 +21,7 @@ obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
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obj-pci-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-pci.o
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obj-pci-$(CONFIG_MACH_PRONGHORN) += pronghorn-pci.o
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obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o
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+obj-pci-$(CONFIG_MACH_COMPEXWP18) += ixdp425-pci.o
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obj-y += common.o
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@@ -43,6 +44,7 @@ obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_
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obj-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-setup.o
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obj-$(CONFIG_MACH_PRONGHORN) += pronghorn-setup.o
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obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o
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+obj-$(CONFIG_MACH_COMPEXWP18) += compex42x-setup.o
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obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
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obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
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--- /dev/null
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+++ b/arch/arm/mach-ixp4xx/compex42x-setup.c
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@@ -0,0 +1,141 @@
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+/*
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+ * arch/arm/mach-ixp4xx/compex-setup.c
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+ *
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+ * Compex WP18 / NP18A board-setup
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+ *
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+ * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org>
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+ *
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+ * based on coyote-setup.c:
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+ * Copyright (C) 2003-2005 MontaVista Software, Inc.
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+ *
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+ * Author: Imre Kaloz <Kaloz@openwrt.org>
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/serial.h>
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+#include <linux/serial_8250.h>
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+#include <linux/dma-mapping.h>
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+
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+#include <asm/mach-types.h>
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+#include <asm/mach/arch.h>
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+#include <asm/mach/flash.h>
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+
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+static struct flash_platform_data compex42x_flash_data = {
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+ .map_name = "cfi_probe",
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+ .width = 2,
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+};
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+
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+static struct resource compex42x_flash_resource = {
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+ .flags = IORESOURCE_MEM,
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+};
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+
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+static struct platform_device compex42x_flash = {
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+ .name = "IXP4XX-Flash",
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+ .id = 0,
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+ .dev = {
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+ .platform_data = &compex42x_flash_data,
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+ },
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+ .num_resources = 1,
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+ .resource = &compex42x_flash_resource,
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+};
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+
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+static struct resource compex42x_uart_resources[] = {
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+ {
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+ .start = IXP4XX_UART1_BASE_PHYS,
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+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
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+ .flags = IORESOURCE_MEM
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+ },
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+ {
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+ .start = IXP4XX_UART2_BASE_PHYS,
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+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
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+ .flags = IORESOURCE_MEM
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+ }
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+};
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+
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+static struct plat_serial8250_port compex42x_uart_data[] = {
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+ {
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+ .mapbase = IXP4XX_UART1_BASE_PHYS,
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+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
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+ .irq = IRQ_IXP4XX_UART1,
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+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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+ .iotype = UPIO_MEM,
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+ .regshift = 2,
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+ .uartclk = IXP4XX_UART_XTAL,
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+ },
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+ {
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+ .mapbase = IXP4XX_UART2_BASE_PHYS,
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+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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+ .irq = IRQ_IXP4XX_UART2,
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+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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+ .iotype = UPIO_MEM,
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+ .regshift = 2,
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+ .uartclk = IXP4XX_UART_XTAL,
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+ },
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+ { },
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+};
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+
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+static struct platform_device compex42x_uart = {
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+ .name = "serial8250",
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+ .id = PLAT8250_DEV_PLATFORM,
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+ .dev.platform_data = compex42x_uart_data,
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+ .num_resources = 2,
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+ .resource = compex42x_uart_resources,
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+};
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+
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+static struct eth_plat_info compex42x_plat_eth[] = {
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+ {
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+ .phy = IXP4XX_ETH_PHY_MAX_ADDR,
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+ .phy_mask = 0xf0000,
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+ .rxq = 3,
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+ .txreadyq = 20,
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+ }, {
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+ .phy = 3,
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+ .rxq = 4,
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+ .txreadyq = 21,
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+ }
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+};
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+
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+static struct platform_device compex42x_eth[] = {
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+ {
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+ .name = "ixp4xx_eth",
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+ .id = IXP4XX_ETH_NPEB,
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+ .dev.platform_data = compex42x_plat_eth,
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+ .dev.coherent_dma_mask = DMA_BIT_MASK(32),
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+ }, {
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+ .name = "ixp4xx_eth",
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+ .id = IXP4XX_ETH_NPEC,
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+ .dev.platform_data = compex42x_plat_eth + 1,
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+ .dev.coherent_dma_mask = DMA_BIT_MASK(32),
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+ }
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+};
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+
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+static struct platform_device *compex42x_devices[] __initdata = {
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+ &compex42x_flash,
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+ &compex42x_uart,
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+ &compex42x_eth[0],
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+ &compex42x_eth[1],
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+};
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+
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+static void __init compex42x_init(void)
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+{
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+ ixp4xx_sys_init();
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+
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+ compex42x_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
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+ compex42x_flash_resource.end =
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+ IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
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+
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+ platform_add_devices(compex42x_devices, ARRAY_SIZE(compex42x_devices));
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+}
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+
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+MACHINE_START(COMPEXWP18, "Compex WP18 / NP18A")
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+ /* Maintainer: Imre Kaloz <Kaloz@openwrt.org> */
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+ .map_io = ixp4xx_map_io,
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+ .init_irq = ixp4xx_init_irq,
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+ .init_time = ixp4xx_timer_init,
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+ .atag_offset = 0x0100,
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+ .init_machine = compex42x_init,
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+#if defined(CONFIG_PCI)
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+ .dma_zone_size = SZ_64M,
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+#endif
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+ .restart = ixp4xx_restart,
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+MACHINE_END
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--- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
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+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
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@@ -69,7 +69,8 @@ struct hw_pci ixdp425_pci __initdata = {
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int __init ixdp425_pci_init(void)
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{
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if (machine_is_ixdp425() || machine_is_ixcdp1100() ||
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- machine_is_ixdp465() || machine_is_kixrp435())
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+ machine_is_ixdp465() || machine_is_kixrp435() ||
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+ machine_is_compex42x())
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pci_common_init(&ixdp425_pci);
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return 0;
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}
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