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115 lines
2.0 KiB
115 lines
2.0 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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*
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* Copyright (c) 2018 Peng Zhang <sd20@qxwlan.com>
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*
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*/
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#include "qcom-ipq4019-qxwlan-e2600ac.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Qxwlan E2600AC c2";
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compatible = "qxwlan,e2600ac-c2";
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};
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&blsp1_spi1 {
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
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flash@0 {
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reg = <0>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <24000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "0:SBL1";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "0:MIBIB";
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reg = <0x40000 0x20000>;
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read-only;
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};
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partition@60000 {
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label = "0:QSEE";
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reg = <0x60000 0x60000>;
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read-only;
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};
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partition@c0000 {
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label = "0:CDT";
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reg = <0xc0000 0x10000>;
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read-only;
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};
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partition@d0000 {
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label = "0:DDRPARAMS";
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reg = <0xd0000 0x10000>;
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read-only;
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};
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partition@e0000 {
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label = "0:APPSBLENV";
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reg = <0xe0000 0x10000>;
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read-only;
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};
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partition@f0000 {
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label = "0:APPSBL";
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reg = <0xf0000 0x80000>;
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read-only;
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};
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partition@170000 {
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label = "0:ART";
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reg = <0x170000 0x10000>;
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read-only;
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};
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};
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};
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};
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&nand {
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pinctrl-0 = <&nand_pins>;
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pinctrl-names = "default";
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status = "okay";
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nand@0 {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "ubi";
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reg = <0x00000000 0x04000000>;
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};
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};
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};
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};
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&tlmm {
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nand_pins: nand-pins {
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pullups {
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pins = "gpio53", "gpio58", "gpio59";
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function = "qpic";
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bias-pull-up;
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};
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pulldowns {
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pins = "gpio54", "gpio55", "gpio56",
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"gpio57", "gpio60", "gpio61",
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"gpio62", "gpio63", "gpio64",
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"gpio65", "gpio66", "gpio67",
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"gpio68", "gpio69";
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function = "qpic";
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bias-pull-down;
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};
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};
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};
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