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65 lines
1.7 KiB
65 lines
1.7 KiB
From 8ab5f1fbd39c29125403678a0caf0a71046da361 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Date: Mon, 6 Jun 2016 09:43:49 +0200
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Subject: [PATCH 1/2] ARM: BCM5301X: Specify NAND chip select and ECC in
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separated files
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Using separated file with common chip select parameters will allow us
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adding other ECC setups without code duplication.
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi | 16 +++++-----------
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arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi | 18 ++++++++++++++++++
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2 files changed, 23 insertions(+), 11 deletions(-)
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create mode 100644 arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi
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--- a/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi
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+++ b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi
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@@ -9,16 +9,10 @@
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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-/ {
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- nand@18028000 {
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- nandcs@0 {
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- compatible = "brcm,nandcs";
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- reg = <0>;
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- #address-cells = <1>;
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- #size-cells = <1>;
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+#include "bcm5301x-nand-cs0.dtsi"
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- nand-ecc-strength = <8>;
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- nand-ecc-step-size = <512>;
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- };
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- };
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+&nandcs {
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+ nand-ecc-algo = "bch";
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+ nand-ecc-strength = <8>;
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+ nand-ecc-step-size = <512>;
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};
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi
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@@ -0,0 +1,18 @@
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+/*
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+ * Broadcom Northstar NAND.
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+ *
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+ * Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * Licensed under the GNU/GPL. See COPYING for details.
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+ */
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+
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+/ {
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+ nand@18028000 {
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+ nandcs: nandcs@0 {
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+ compatible = "brcm,nandcs";
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+ reg = <0>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ };
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+ };
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+};
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