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379 lines
9.7 KiB
379 lines
9.7 KiB
bcm53xx: initial support for the BCM5301/BCM470X SoC
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with ARM CPU
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This patch adds support for the BCM5301/BCM470X SoCs with an ARM CPU.
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Currently just booting to a shell is working and nothing else, no
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Ethernet, wifi, flash, ...
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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arch/arm/Kconfig | 2 +
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arch/arm/Kconfig.debug | 5 ++
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arch/arm/Makefile | 1 +
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arch/arm/boot/dts/Makefile | 1 +
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arch/arm/boot/dts/bcm5301-netgear-r6250.dts | 20 +++++++
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arch/arm/boot/dts/bcm5301.dtsi | 83 +++++++++++++++++++++++++++
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arch/arm/include/debug/bcm53xx.S | 19 ++++++
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arch/arm/mach-bcm53xx/Kconfig | 15 +++++
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arch/arm/mach-bcm53xx/Makefile | 1 +
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arch/arm/mach-bcm53xx/bcm53xx.c | 69 ++++++++++++++++++++++
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10 files changed, 216 insertions(+)
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create mode 100644 arch/arm/boot/dts/bcm5301-netgear-r6250.dts
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create mode 100644 arch/arm/boot/dts/bcm5301.dtsi
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create mode 100644 arch/arm/include/debug/bcm53xx.S
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create mode 100644 arch/arm/mach-bcm53xx/Kconfig
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create mode 100644 arch/arm/mach-bcm53xx/Makefile
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create mode 100644 arch/arm/mach-bcm53xx/bcm53xx.c
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--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -922,6 +922,8 @@ source "arch/arm/mach-bcm/Kconfig"
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source "arch/arm/mach-bcm2835/Kconfig"
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+source "arch/arm/mach-bcm53xx/Kconfig"
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+
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source "arch/arm/mach-clps711x/Kconfig"
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source "arch/arm/mach-cns3xxx/Kconfig"
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--- a/arch/arm/Kconfig.debug
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+++ b/arch/arm/Kconfig.debug
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@@ -93,6 +93,10 @@ choice
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bool "Kernel low-level debugging on BCM2835 PL011 UART"
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depends on ARCH_BCM2835
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+ config DEBUG_BCM_5301X
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+ bool "Kernel low-level debugging on BCM53XX UART1"
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+ depends on ARCH_BCM_5301X
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+
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config DEBUG_CLPS711X_UART1
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bool "Kernel low-level debugging messages via UART1"
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depends on ARCH_CLPS711X
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@@ -620,6 +624,7 @@ endchoice
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config DEBUG_LL_INCLUDE
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string
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default "debug/bcm2835.S" if DEBUG_BCM2835
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+ default "debug/bcm53xx.S" if DEBUG_BCM_5301X
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default "debug/cns3xxx.S" if DEBUG_CNS3XXX
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default "debug/exynos.S" if DEBUG_EXYNOS_UART
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default "debug/highbank.S" if DEBUG_HIGHBANK_UART
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--- a/arch/arm/Makefile
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+++ b/arch/arm/Makefile
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@@ -145,6 +145,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x0020
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machine-$(CONFIG_ARCH_AT91) += at91
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machine-$(CONFIG_ARCH_BCM) += bcm
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machine-$(CONFIG_ARCH_BCM2835) += bcm2835
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+machine-$(CONFIG_ARCH_BCM_5301X) += bcm53xx
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machine-$(CONFIG_ARCH_CLPS711X) += clps711x
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machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
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machine-$(CONFIG_ARCH_DAVINCI) += davinci
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -209,6 +209,7 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07
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wm8650-mid.dtb \
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wm8850-w70v2.dtb
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dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
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+dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
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targets += dtbs
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targets += $(dtb-y)
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
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@@ -0,0 +1,35 @@
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+/*
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+ * Broadcom BCM470X / BCM5301X arm platform code.
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+ * DTS for Netgear R6250 V1
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+ *
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+ * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * Licensed under the GNU/GPL. See COPYING for details.
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+ */
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+
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+/dts-v1/;
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+
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+#include "bcm4708.dtsi"
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+
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+/ {
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+ compatible = "netgear,r6250v1", "brcm,bcm4708";
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+ model = "Netgear R6250 V1 (BCM4708)";
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+
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+ chosen {
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+ bootargs = "console=ttyS0,115200";
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+ };
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+
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+ memory {
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+ reg = <0x00000000 0x08000000>;
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+ };
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+
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+ chipcommonA {
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+ uart0: serial@0300 {
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+ status = "okay";
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+ };
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+
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+ uart1: serial@0400 {
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+ status = "okay";
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+ };
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm4708.dtsi
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@@ -0,0 +1,34 @@
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+/*
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+ * Broadcom BCM470X / BCM5301X ARM platform code.
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+ * DTS for BCM4708 SoC.
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+ *
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+ * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * Licensed under the GNU/GPL. See COPYING for details.
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+ */
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+
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+#include "bcm5301x.dtsi"
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+
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+/ {
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+ compatible = "brcm,bcm4708";
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+
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+ cpus {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ cpu@0 {
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+ device_type = "cpu";
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+ compatible = "arm,cortex-a9";
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+ next-level-cache = <&L2>;
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+ reg = <0x0>;
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+ };
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+
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+ cpu@1 {
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+ device_type = "cpu";
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+ compatible = "arm,cortex-a9";
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+ next-level-cache = <&L2>;
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+ reg = <0x1>;
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+ };
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+ };
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+
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm5301x.dtsi
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@@ -0,0 +1,95 @@
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+/*
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+ * Broadcom BCM470X / BCM5301X ARM platform code.
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+ * Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015,
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+ * BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs
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+ *
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+ * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * Licensed under the GNU/GPL. See COPYING for details.
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+ */
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+
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+#include <dt-bindings/interrupt-controller/irq.h>
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+#include <dt-bindings/interrupt-controller/arm-gic.h>
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+#include "skeleton.dtsi"
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+
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+/ {
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+ interrupt-parent = <&gic>;
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+
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+ chipcommonA {
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+ compatible = "simple-bus";
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+ ranges = <0x00000000 0x18000000 0x00001000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ uart0: serial@0300 {
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+ compatible = "ns16550";
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+ reg = <0x0300 0x100>;
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+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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+ clock-frequency = <100000000>;
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+ status = "disabled";
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+ };
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+
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+ uart1: serial@0400 {
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+ compatible = "ns16550";
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+ reg = <0x0400 0x100>;
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+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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+ clock-frequency = <100000000>;
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+ status = "disabled";
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+ };
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+ };
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+
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+ mpcore {
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+ compatible = "simple-bus";
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+ ranges = <0x00000000 0x19020000 0x00003000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ scu@0000 {
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+ compatible = "arm,cortex-a9-scu";
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+ reg = <0x0000 0x100>;
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+ };
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+
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+ timer@0200 {
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+ compatible = "arm,cortex-a9-global-timer";
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+ reg = <0x0200 0x100>;
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+ interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clk_periph>;
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+ };
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+
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+ local-timer@0600 {
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+ compatible = "arm,cortex-a9-twd-timer";
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+ reg = <0x0600 0x100>;
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+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clk_periph>;
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+ };
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+
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+ gic: interrupt-controller@1000 {
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+ compatible = "arm,cortex-a9-gic";
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+ #interrupt-cells = <3>;
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+ #address-cells = <0>;
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+ interrupt-controller;
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+ reg = <0x1000 0x1000>,
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+ <0x0100 0x100>;
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+ };
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+
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+ L2: cache-controller@2000 {
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+ compatible = "arm,pl310-cache";
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+ reg = <0x2000 0x1000>;
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+ cache-unified;
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+ cache-level = <2>;
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+ };
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+ };
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+
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+ clocks {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ /* As long as we do not have a real clock driver us this
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+ * fixed clock */
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+ clk_periph: periph {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <400000000>;
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+ };
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/include/debug/bcm53xx.S
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@@ -0,0 +1,19 @@
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+/*
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+ * Macros used for EARLY_PRINTK, in low-level UART debug console
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+ *
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+ * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * Licensed under the GNU/GPL. See COPYING for details.
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+ */
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+
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+#define BCM53XX_UART1_PHYS 0x18000300
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+#define BCM53XX_UART1_VIRT 0xf1000300
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+#define BCM53XX_UART1_SH 0
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+
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+ .macro addruart, rp, rv, tmp
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+ ldr \rp, =BCM53XX_UART1_PHYS @ MMU off, Physical
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+ ldr \rv, =BCM53XX_UART1_VIRT @ MMU on, Virtual
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+ .endm
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+
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+#define UART_SHIFT BCM53XX_UART1_SH
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+#include <asm/hardware/debug-8250.S>
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--- /dev/null
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+++ b/arch/arm/mach-bcm53xx/Kconfig
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@@ -0,0 +1,25 @@
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+config ARCH_BCM_5301X
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+ bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
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+ depends on MMU
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+ select ARM_GIC
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+ select CACHE_L2X0
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+ select HAVE_ARM_SCU if SMP
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+ select HAVE_ARM_TWD if SMP
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+ select HAVE_SMP
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+ select COMMON_CLK
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+ select GENERIC_CLOCKEVENTS
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+ select ARM_GLOBAL_TIMER
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+ select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
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+ select MIGHT_HAVE_PCI
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+ help
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+ Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.
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+
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+ This is a network SoC line mostly used in home routers and
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+ wifi access points.
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+ This inclused the following SoC: BCM53010, BCM53011, BCM53012,
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+ BCM53014, BCM53015, BCM53016, BCM53017, BCM53018, BCM4707,
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+ BCM4708 and BCM4709.
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+
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+ Do not confuse this with the BCM4760 which is a totally
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+ different SoC or with the older BCM47XX and BCM53XX based
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+ network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx
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--- /dev/null
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+++ b/arch/arm/mach-bcm53xx/Makefile
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@@ -0,0 +1 @@
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+obj-y += bcm53xx.o
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--- /dev/null
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+++ b/arch/arm/mach-bcm53xx/bcm53xx.c
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@@ -0,0 +1,70 @@
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+/*
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+ * Broadcom BCM470X / BCM5301X ARM platform code.
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+ *
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+ * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * Licensed under the GNU/GPL. See COPYING for details.
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+ */
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+#include <linux/of_platform.h>
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+#include <linux/clocksource.h>
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+#include <linux/clk-provider.h>
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+#include <asm/hardware/cache-l2x0.h>
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+
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+#include <asm/mach/arch.h>
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+#include <asm/siginfo.h>
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+#include <asm/signal.h>
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+
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+
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+static bool first_fault = true;
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+
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+static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr,
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+ struct pt_regs *regs)
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+{
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+ if (fsr == 0x1c06 && first_fault) {
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+ first_fault = false;
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+
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+ /*
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+ * These faults with code 0x1c06 happens for no good reason,
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+ * possibly left over from the CFE boot loader.
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+ */
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+ pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
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+ addr, fsr);
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+
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+ /* Returning non-zero causes fault display and panic */
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+ return 0;
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+ }
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+
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+ /* Others should cause a fault */
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+ return 1;
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+}
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+
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+static void __init bcm5301x_init_early(void)
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+{
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+ /* Install our hook */
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+ hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, BUS_OBJERR,
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+ "imprecise external abort");
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+}
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+
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+static void __init bcm5301x_timer_init(void)
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+{
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+ of_clk_init(NULL);
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+ clocksource_of_init();
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+}
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+
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+static void __init bcm5301x_dt_init(void)
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+{
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+ l2x0_of_init(0, ~0UL);
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+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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+}
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+
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+static const char __initconst *bcm5301x_dt_compat[] = {
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+ "brcm,bcm4708",
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+ NULL,
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+};
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+
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+DT_MACHINE_START(BCM5301X, "BCM5301X")
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+ .init_early = bcm5301x_init_early,
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+ .init_time = bcm5301x_timer_init,
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+ .init_machine = bcm5301x_dt_init,
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+ .dt_compat = bcm5301x_dt_compat,
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+MACHINE_END
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