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452 lines
14 KiB
452 lines
14 KiB
From 9a70f2dcb24a5aab29386373c86ba035acba4891 Mon Sep 17 00:00:00 2001
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From: Axel Gembe <ago@bastart.eu.org>
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Date: Sun, 18 May 2008 12:07:21 +0200
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Subject: [PATCH] bcm963xx: rewrite irq handling code
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This patch adds interrupt handling as on AR7. The old code was very messy and
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didn't work too well.
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Signed-off-by: Axel Gembe <ago@bastart.eu.org>
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---
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arch/mips/bcm963xx/irq.c | 308 ++++++++++-------------------
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drivers/serial/bcm63xx_cons.c | 13 +-
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include/asm-mips/mach-bcm963xx/bcm_intr.h | 18 +--
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3 files changed, 119 insertions(+), 220 deletions(-)
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--- a/arch/mips/bcm963xx/irq.c
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+++ b/arch/mips/bcm963xx/irq.c
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@@ -1,259 +1,159 @@
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/*
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-<:copyright-gpl
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- Copyright 2002 Broadcom Corp. All Rights Reserved.
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-
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- This program is free software; you can distribute it and/or modify it
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- under the terms of the GNU General Public License (Version 2) as
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- published by the Free Software Foundation.
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-
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- This program is distributed in the hope it will be useful, but WITHOUT
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- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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- for more details.
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-
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- You should have received a copy of the GNU General Public License along
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- with this program; if not, write to the Free Software Foundation, Inc.,
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- 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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-:>
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-*/
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-/*
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- * Interrupt control functions for Broadcom 963xx MIPS boards
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+ * Copyright (C) 2006,2007 Felix Fietkau <nbd@openwrt.org>
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+ * Copyright (C) 2006,2007 Eugene Konev <ejka@openwrt.org>
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+ * Copyright (C) 2008 Axel Gembe <ago@bastart.eu.org>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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-#include <asm/atomic.h>
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-
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-#include <linux/delay.h>
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-#include <linux/init.h>
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-#include <linux/ioport.h>
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-#include <linux/irq.h>
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#include <linux/interrupt.h>
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-#include <linux/kernel.h>
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-#include <linux/slab.h>
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-#include <linux/module.h>
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+#include <linux/io.h>
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-#include <asm/irq.h>
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+#include <asm/irq_cpu.h>
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#include <asm/mipsregs.h>
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-#include <asm/addrspace.h>
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-#include <asm/signal.h>
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+
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#include <6348_map_part.h>
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#include <6348_intr.h>
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#include <bcm_map_part.h>
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#include <bcm_intr.h>
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-static void irq_dispatch_int(void)
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-{
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- unsigned int pendingIrqs;
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- static unsigned int irqBit;
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- static unsigned int isrNumber = 31;
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-
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- pendingIrqs = PERF->IrqStatus & PERF->IrqMask;
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- if (!pendingIrqs) {
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- return;
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- }
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+static int bcm963xx_irq_base;
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- while (1) {
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- irqBit <<= 1;
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- isrNumber++;
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- if (isrNumber == 32) {
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- isrNumber = 0;
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- irqBit = 0x1;
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- }
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- if (pendingIrqs & irqBit) {
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- PERF->IrqMask &= ~irqBit; // mask
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- do_IRQ(isrNumber + INTERNAL_ISR_TABLE_OFFSET);
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- break;
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- }
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- }
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+void bcm963xx_unmask_irq(unsigned int irq)
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+{
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+ PERF->IrqMask |= (1 << (irq - bcm963xx_irq_base));
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}
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-static void irq_dispatch_ext(uint32 irq)
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+void bcm963xx_mask_irq(unsigned int irq)
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{
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- if (!(PERF->ExtIrqCfg & (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)))) {
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- printk("**** Ext IRQ mask. Should not dispatch ****\n");
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- }
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- /* disable and clear interrupt in the controller */
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- PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
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- PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
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- do_IRQ(irq);
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+ PERF->IrqMask &= ~(1 << (irq - bcm963xx_irq_base));
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}
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-
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-//extern void brcm_timer_interrupt(struct pt_regs *regs);
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-
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-asmlinkage void plat_irq_dispatch(void)
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+void bcm963xx_ack_irq(unsigned int irq)
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{
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- unsigned long cause;
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-
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- cause = read_c0_status() & read_c0_cause() & ST0_IM;
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- if (cause & CAUSEF_IP7)
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- do_IRQ(7);
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- else if (cause & CAUSEF_IP2)
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- irq_dispatch_int();
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- else if (cause & CAUSEF_IP3)
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- irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_0);
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- else if (cause & CAUSEF_IP4)
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- irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_1);
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- else if (cause & CAUSEF_IP5)
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- irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_2);
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- else if (cause & CAUSEF_IP6) {
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- irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_3);
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- local_irq_disable();
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- }
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+ PERF->IrqStatus &= ~(1 << (irq - bcm963xx_irq_base));
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}
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-
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-void enable_brcm_irq(unsigned int irq)
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+void bcm963xx_unmask_ext_irq(unsigned int irq)
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{
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- unsigned long flags;
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-
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- local_irq_save(flags);
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- if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
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- PERF->IrqMask |= (1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
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- }
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- else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
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- /* enable and clear interrupt in the controller */
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- PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
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PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
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- }
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- local_irq_restore(flags);
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}
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-void disable_brcm_irq(unsigned int irq)
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+void bcm963xx_mask_ext_irq(unsigned int irq)
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{
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- unsigned long flags;
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-
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- local_irq_save(flags);
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- if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
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- PERF->IrqMask &= ~(1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
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- }
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- else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
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- /* disable interrupt in the controller */
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PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
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- }
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- local_irq_restore(flags);
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}
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-void ack_brcm_irq(unsigned int irq)
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+void bcm963xx_ack_ext_irq(unsigned int irq)
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{
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- /* Already done in brcm_irq_dispatch */
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+ PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
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}
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-unsigned int startup_brcm_irq(unsigned int irq)
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+static void bcm963xx_dispatch_ext_irq(unsigned int irq)
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{
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- enable_brcm_irq(irq);
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-
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- return 0; /* never anything pending */
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+ bcm963xx_ack_ext_irq(irq);
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+ bcm963xx_mask_ext_irq(irq);
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+ do_IRQ(irq);
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}
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-unsigned int startup_brcm_none(unsigned int irq)
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+static void bcm963xx_cascade(void)
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{
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- return 0;
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-}
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+ uint32_t pending, bit, irq;
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-void end_brcm_irq(unsigned int irq)
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-{
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- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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- enable_brcm_irq(irq);
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-}
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+ if (!(pending = PERF->IrqStatus & PERF->IrqMask))
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+ return;
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-void end_brcm_none(unsigned int irq)
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-{
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-}
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+ for (irq = 0, bit = 1; irq < 32; irq++, bit <<= 1) {
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+ if (pending & bit) {
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+ bcm963xx_ack_irq(irq + bcm963xx_irq_base);
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+ bcm963xx_mask_irq(irq + bcm963xx_irq_base);
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+ do_IRQ(irq + bcm963xx_irq_base);
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+ return;
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+ }
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+ }
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+
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+ spurious_interrupt();
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+}
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+
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+static struct irq_chip bcm963xx_irq_type = {
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+ .name = "bcm963xx",
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+ .unmask = bcm963xx_unmask_irq,
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+ .mask = bcm963xx_mask_irq,
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+ .ack = bcm963xx_ack_irq
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+};
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-static struct hw_interrupt_type brcm_irq_type = {
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- .typename = "MIPS",
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- .startup = startup_brcm_irq,
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- .shutdown = disable_brcm_irq,
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- .enable = enable_brcm_irq,
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- .disable = disable_brcm_irq,
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- .ack = ack_brcm_irq,
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- .end = end_brcm_irq,
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- .set_affinity = NULL
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+static struct irq_chip bcm963xx_ext_irq_type = {
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+ .name = "bcm963xx_ext",
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+ .unmask = bcm963xx_unmask_ext_irq,
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+ .mask = bcm963xx_mask_ext_irq,
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+ .ack = bcm963xx_ack_ext_irq,
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};
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-static struct hw_interrupt_type brcm_irq_no_end_type = {
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- .typename = "MIPS",
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- .startup = startup_brcm_none,
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- .shutdown = disable_brcm_irq,
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- .enable = enable_brcm_irq,
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- .disable = disable_brcm_irq,
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- .ack = ack_brcm_irq,
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- .end = end_brcm_none,
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- .set_affinity = NULL
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+static struct irqaction bcm963xx_cascade_action = {
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+ .handler = no_action,
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+ .name = "BCM963xx cascade interrupt"
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};
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-void __init arch_init_irq(void)
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+static void __init bcm963xx_irq_init(int base)
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{
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int i;
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- clear_c0_status(ST0_BEV);
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- change_c0_status(ST0_IM, (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4));
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+ bcm963xx_irq_base = base;
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- for (i = 0; i < NR_IRQS; i++) {
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- irq_desc[i].status = IRQ_DISABLED;
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- irq_desc[i].action = 0;
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- irq_desc[i].depth = 1;
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- irq_desc[i].chip = &brcm_irq_type;
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- }
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+ /* External IRQs */
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+ set_irq_chip_and_handler(INTERRUPT_ID_EXTERNAL_0, &bcm963xx_ext_irq_type,
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+ handle_level_irq);
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+ set_irq_chip_and_handler(INTERRUPT_ID_EXTERNAL_1, &bcm963xx_ext_irq_type,
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+ handle_level_irq);
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+ set_irq_chip_and_handler(INTERRUPT_ID_EXTERNAL_2, &bcm963xx_ext_irq_type,
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+ handle_level_irq);
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+ set_irq_chip_and_handler(INTERRUPT_ID_EXTERNAL_3, &bcm963xx_ext_irq_type,
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+ handle_level_irq);
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+
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+ for (i = 0; i < 32; i++) {
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+ set_irq_chip_and_handler(base + i, &bcm963xx_irq_type,
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+ handle_level_irq);
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+ }
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+
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+ setup_irq(2, &bcm963xx_cascade_action);
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+ setup_irq(bcm963xx_irq_base, &bcm963xx_cascade_action);
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+ set_c0_status(IE_IRQ0);
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}
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-int request_external_irq(unsigned int irq,
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- FN_HANDLER handler,
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- unsigned long irqflags,
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- const char * devname,
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- void *dev_id)
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+asmlinkage void plat_irq_dispatch(void)
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{
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- unsigned long flags;
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-
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- local_irq_save(flags);
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+ unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
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- PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT)); // Clear
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- PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)); // Mask
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- PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_INSENS_SHFT)); // Edge insesnsitive
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- PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_LEVEL_SHFT)); // Level triggered
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- PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_SENSE_SHFT)); // Low level
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-
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- local_irq_restore(flags);
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-
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- return( request_irq(irq, handler, irqflags, devname, dev_id) );
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+ if (pending & STATUSF_IP7) /* cpu timer */
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+ do_IRQ(7);
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+ else if (pending & STATUSF_IP2) /* internal interrupt cascade */
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+ bcm963xx_cascade();
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+ else if (pending & STATUSF_IP3)
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+ bcm963xx_dispatch_ext_irq(INTERRUPT_ID_EXTERNAL_0);
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+ else if (pending & STATUSF_IP4)
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+ bcm963xx_dispatch_ext_irq(INTERRUPT_ID_EXTERNAL_1);
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+ else if (pending & STATUSF_IP5)
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+ bcm963xx_dispatch_ext_irq(INTERRUPT_ID_EXTERNAL_2);
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+ else if (pending & STATUSF_IP6)
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+ bcm963xx_dispatch_ext_irq(INTERRUPT_ID_EXTERNAL_3);
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+ else
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+ spurious_interrupt();
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}
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-/* VxWorks compatibility function(s). */
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-
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-unsigned int BcmHalMapInterrupt(FN_HANDLER pfunc, unsigned int param,
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- unsigned int interruptId)
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+void __init arch_init_irq(void)
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{
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- int nRet = -1;
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- char *devname;
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-
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- devname = kmalloc(16, GFP_KERNEL);
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- if (devname)
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- sprintf( devname, "brcm_%d", interruptId );
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-
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- /* Set the IRQ description to not automatically enable the interrupt at
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- * the end of an ISR. The driver that handles the interrupt must
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- * explicitly call BcmHalInterruptEnable or enable_brcm_irq. This behavior
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- * is consistent with interrupt handling on VxWorks.
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- */
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- irq_desc[interruptId].chip = &brcm_irq_no_end_type;
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-
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- if( interruptId >= INTERNAL_ISR_TABLE_OFFSET )
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- {
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- printk("BcmHalMapInterrupt : internal IRQ\n");
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- nRet = request_irq( interruptId, pfunc, IRQF_DISABLED, devname, (void *) param );
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- }
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- else if (interruptId >= INTERRUPT_ID_EXTERNAL_0 && interruptId <= INTERRUPT_ID_EXTERNAL_3)
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- {
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- printk("BcmHalMapInterrupt : external IRQ\n");
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- nRet = request_external_irq( interruptId, pfunc, IRQF_DISABLED, devname, (void *) param );
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- }
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-
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- return( nRet );
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+ mips_cpu_irq_init();
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+ bcm963xx_irq_init(INTERNAL_ISR_TABLE_OFFSET);
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}
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-
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-
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-EXPORT_SYMBOL(enable_brcm_irq);
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-EXPORT_SYMBOL(disable_brcm_irq);
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-EXPORT_SYMBOL(request_external_irq);
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-EXPORT_SYMBOL(BcmHalMapInterrupt);
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-
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--- a/drivers/serial/bcm63xx_cons.c
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+++ b/drivers/serial/bcm63xx_cons.c
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@@ -267,7 +267,7 @@
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}
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// Clear the interrupt
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- enable_brcm_irq(INTERRUPT_ID_UART);
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+// bcm963xx_unmask_irq(INTERRUPT_ID_UART);
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
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return IRQ_HANDLED;
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#endif
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@@ -880,7 +880,7 @@
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info->count++;
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tty->driver_data = info;
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info->tty = tty;
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- enable_brcm_irq(INTERRUPT_ID_UART);
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+ bcm963xx_unmask_irq(INTERRUPT_ID_UART);
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// Start up serial port
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retval = startup(info);
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@@ -927,7 +927,7 @@
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-------------------------------------------------------------------------- */
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static int __init bcm63xx_serialinit(void)
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{
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- int i, flags;
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+ int i, flags, res;
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struct bcm_serial *info;
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// Print the driver version information
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@@ -981,7 +981,12 @@
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*/
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if (!info->port)
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return 0;
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- BcmHalMapInterrupt(bcm_interrupt, 0, INTERRUPT_ID_UART);
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+
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+ res = request_irq(INTERRUPT_ID_UART, bcm_interrupt, 0, "bcm-uart", NULL);
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+ if (res) {
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+ spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
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+ return res;
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+ }
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}
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/* order matters here... the trick is that flags
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--- a/include/asm-mips/mach-bcm963xx/bcm_intr.h
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+++ b/include/asm-mips/mach-bcm963xx/bcm_intr.h
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@@ -39,18 +39,12 @@
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typedef int (*FN_HANDLER) (int, void *);
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/* prototypes */
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-extern void enable_brcm_irq(unsigned int irq);
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-extern void disable_brcm_irq(unsigned int irq);
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-extern int request_external_irq(unsigned int irq,
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- FN_HANDLER handler, unsigned long irqflags,
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- const char * devname, void *dev_id);
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-extern unsigned int BcmHalMapInterrupt(FN_HANDLER isr, unsigned int param,
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- unsigned int interruptId);
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-extern void dump_intr_regs(void);
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-
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-/* compatibility definitions */
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-#define BcmHalInterruptEnable(irq) enable_brcm_irq( irq )
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-#define BcmHalInterruptDisable(irq) disable_brcm_irq( irq )
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+extern void bcm963xx_unmask_irq(unsigned int irq);
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+extern void bcm963xx_mask_irq(unsigned int irq);
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+extern void bcm963xx_ack_irq(unsigned int irq);
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+extern void bcm963xx_unmask_ext_irq(unsigned int irq);
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+extern void bcm963xx_mask_ext_irq(unsigned int irq);
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+extern void bcm963xx_ack_ext_irq(unsigned int irq);
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#ifdef __cplusplus
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}
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