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159 lines
2.5 KiB
159 lines
2.5 KiB
/dts-v1/;
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#include "mt7620a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "tplink,c20i", "ralink,mt7620a-soc";
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model = "TP-Link Archer C20i";
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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gpio-leds {
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compatible = "gpio-leds";
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lan {
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label = "c20i:blue:lan";
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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};
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usb {
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label = "c20i:blue:usb";
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gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
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trigger-sources = <&ohci_port1>, <&ehci_port1>;
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linux,default-trigger = "usbport";
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};
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wps {
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label = "c20i:blue:wps";
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gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
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};
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wan {
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label = "c20i:blue:wan";
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gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
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};
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wlan {
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label = "c20i:blue:wlan";
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gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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rfkill {
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label = "rfkill";
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RFKILL>;
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};
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reset_wps {
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label = "reset_wps";
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&gpio3 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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m25p80@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x20000>;
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read-only;
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};
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partition@20000 {
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compatible = "tplink,firmware";
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label = "firmware";
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reg = <0x20000 0x7a0000>;
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};
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partition@7c0000 {
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label = "config";
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reg = <0x7c0000 0x10000>;
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};
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rom: partition@7d0000 {
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label = "rom";
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reg = <0x7d0000 0x10000>;
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};
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partition@7e0000 {
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label = "romfile";
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reg = <0x7e0000 0x10000>;
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};
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radio: partition@7f0000 {
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label = "radio";
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reg = <0x7f0000 0x10000>;
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};
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};
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};
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
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ralink,function = "gpio";
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};
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};
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};
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ðernet {
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pinctrl-names = "default";
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mtd-mac-address = <&rom 0xf100>;
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mediatek,portmap = "wllll";
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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&gsw {
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mediatek,port4 = "ephy";
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};
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&wmac {
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ralink,mtd-eeprom = <&radio 0>;
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&radio 32768>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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