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265 lines
8.4 KiB
265 lines
8.4 KiB
--- a/drivers/ssb/driver_chipcommon_pmu.c
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+++ b/drivers/ssb/driver_chipcommon_pmu.c
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@@ -417,9 +417,9 @@ static void ssb_pmu_resources_init(struc
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u32 min_msk = 0, max_msk = 0;
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unsigned int i;
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const struct pmu_res_updown_tab_entry *updown_tab = NULL;
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- unsigned int updown_tab_size;
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+ unsigned int updown_tab_size = 0;
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const struct pmu_res_depend_tab_entry *depend_tab = NULL;
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- unsigned int depend_tab_size;
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+ unsigned int depend_tab_size = 0;
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switch (bus->chip_id) {
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case 0x4312:
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--- a/drivers/ssb/driver_gige.c
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+++ b/drivers/ssb/driver_gige.c
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@@ -106,8 +106,9 @@ void gige_pcicfg_write32(struct ssb_gige
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gige_write32(dev, SSB_GIGE_PCICFG + offset, value);
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}
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-static int ssb_gige_pci_read_config(struct pci_bus *bus, unsigned int devfn,
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- int reg, int size, u32 *val)
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+static int __devinit ssb_gige_pci_read_config(struct pci_bus *bus,
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+ unsigned int devfn, int reg,
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+ int size, u32 *val)
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{
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struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops);
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unsigned long flags;
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@@ -136,8 +137,9 @@ static int ssb_gige_pci_read_config(stru
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return PCIBIOS_SUCCESSFUL;
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}
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-static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn,
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- int reg, int size, u32 val)
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+static int __devinit ssb_gige_pci_write_config(struct pci_bus *bus,
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+ unsigned int devfn, int reg,
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+ int size, u32 val)
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{
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struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops);
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unsigned long flags;
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@@ -166,7 +168,8 @@ static int ssb_gige_pci_write_config(str
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return PCIBIOS_SUCCESSFUL;
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}
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-static int ssb_gige_probe(struct ssb_device *sdev, const struct ssb_device_id *id)
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+static int __devinit ssb_gige_probe(struct ssb_device *sdev,
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+ const struct ssb_device_id *id)
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{
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struct ssb_gige *dev;
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u32 base, tmslow, tmshigh;
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--- a/drivers/ssb/driver_pcicore.c
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+++ b/drivers/ssb/driver_pcicore.c
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@@ -314,7 +314,7 @@ int ssb_pcicore_pcibios_map_irq(const st
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return ssb_mips_irq(extpci_core->dev) + 2;
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}
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-static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
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+static void __devinit ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
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{
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u32 val;
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@@ -379,7 +379,7 @@ static void ssb_pcicore_init_hostmode(st
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register_pci_controller(&ssb_pcicore_controller);
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}
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-static int pcicore_is_in_hostmode(struct ssb_pcicore *pc)
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+static int __devinit pcicore_is_in_hostmode(struct ssb_pcicore *pc)
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{
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struct ssb_bus *bus = pc->dev->bus;
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u16 chipid_top;
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@@ -412,7 +412,7 @@ static int pcicore_is_in_hostmode(struct
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* Workarounds.
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**************************************************/
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-static void ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc)
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+static void __devinit ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc)
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{
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u16 tmp = pcicore_read16(pc, SSB_PCICORE_SPROM(0));
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if (((tmp & 0xF000) >> 12) != pc->dev->core_index) {
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@@ -514,7 +514,7 @@ static void ssb_pcicore_pcie_setup_worka
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* Generic and Clientmode operation code.
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**************************************************/
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-static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
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+static void __devinit ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
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{
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ssb_pcicore_fix_sprom_core_index(pc);
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@@ -529,7 +529,7 @@ static void ssb_pcicore_init_clientmode(
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}
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}
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-void ssb_pcicore_init(struct ssb_pcicore *pc)
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+void __devinit ssb_pcicore_init(struct ssb_pcicore *pc)
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{
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struct ssb_device *dev = pc->dev;
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--- a/drivers/ssb/main.c
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+++ b/drivers/ssb/main.c
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@@ -557,7 +557,7 @@ error:
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}
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/* Needs ssb_buses_lock() */
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-static int ssb_attach_queued_buses(void)
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+static int __devinit ssb_attach_queued_buses(void)
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{
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struct ssb_bus *bus, *n;
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int err = 0;
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@@ -768,9 +768,9 @@ out:
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return err;
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}
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-static int ssb_bus_register(struct ssb_bus *bus,
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- ssb_invariants_func_t get_invariants,
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- unsigned long baseaddr)
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+static int __devinit ssb_bus_register(struct ssb_bus *bus,
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+ ssb_invariants_func_t get_invariants,
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+ unsigned long baseaddr)
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{
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int err;
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@@ -851,8 +851,8 @@ err_disable_xtal:
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}
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#ifdef CONFIG_SSB_PCIHOST
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-int ssb_bus_pcibus_register(struct ssb_bus *bus,
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- struct pci_dev *host_pci)
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+int __devinit ssb_bus_pcibus_register(struct ssb_bus *bus,
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+ struct pci_dev *host_pci)
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{
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int err;
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@@ -875,9 +875,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register);
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#endif /* CONFIG_SSB_PCIHOST */
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#ifdef CONFIG_SSB_PCMCIAHOST
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-int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
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- struct pcmcia_device *pcmcia_dev,
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- unsigned long baseaddr)
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+int __devinit ssb_bus_pcmciabus_register(struct ssb_bus *bus,
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+ struct pcmcia_device *pcmcia_dev,
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+ unsigned long baseaddr)
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{
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int err;
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@@ -897,8 +897,9 @@ EXPORT_SYMBOL(ssb_bus_pcmciabus_register
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#endif /* CONFIG_SSB_PCMCIAHOST */
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#ifdef CONFIG_SSB_SDIOHOST
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-int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func,
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- unsigned int quirks)
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+int __devinit ssb_bus_sdiobus_register(struct ssb_bus *bus,
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+ struct sdio_func *func,
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+ unsigned int quirks)
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{
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int err;
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@@ -918,9 +919,9 @@ int ssb_bus_sdiobus_register(struct ssb_
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EXPORT_SYMBOL(ssb_bus_sdiobus_register);
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#endif /* CONFIG_SSB_PCMCIAHOST */
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-int ssb_bus_ssbbus_register(struct ssb_bus *bus,
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- unsigned long baseaddr,
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- ssb_invariants_func_t get_invariants)
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+int __devinit ssb_bus_ssbbus_register(struct ssb_bus *bus,
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+ unsigned long baseaddr,
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+ ssb_invariants_func_t get_invariants)
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{
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int err;
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@@ -1001,8 +1002,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32
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switch (plltype) {
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case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
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if (m & SSB_CHIPCO_CLK_T6_MMASK)
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- return SSB_CHIPCO_CLK_T6_M0;
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- return SSB_CHIPCO_CLK_T6_M1;
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+ return SSB_CHIPCO_CLK_T6_M1;
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+ return SSB_CHIPCO_CLK_T6_M0;
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case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
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case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
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case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
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@@ -1265,7 +1266,10 @@ u32 ssb_dma_translation(struct ssb_devic
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case SSB_BUSTYPE_SSB:
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return 0;
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case SSB_BUSTYPE_PCI:
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- return SSB_PCI_DMA;
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+ if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64)
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+ return SSB_PCIE_DMA_H32;
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+ else
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+ return SSB_PCI_DMA;
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default:
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__ssb_dma_not_implemented(dev);
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}
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--- a/drivers/ssb/pci.c
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+++ b/drivers/ssb/pci.c
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@@ -734,12 +734,9 @@ out_free:
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static void ssb_pci_get_boardinfo(struct ssb_bus *bus,
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struct ssb_boardinfo *bi)
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{
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- pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_VENDOR_ID,
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- &bi->vendor);
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- pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_ID,
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- &bi->type);
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- pci_read_config_word(bus->host_pci, PCI_REVISION_ID,
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- &bi->rev);
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+ bi->vendor = bus->host_pci->subsystem_vendor;
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+ bi->type = bus->host_pci->subsystem_device;
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+ bi->rev = bus->host_pci->revision;
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}
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int ssb_pci_get_invariants(struct ssb_bus *bus,
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--- a/drivers/ssb/pcihost_wrapper.c
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+++ b/drivers/ssb/pcihost_wrapper.c
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@@ -53,8 +53,8 @@ static int ssb_pcihost_resume(struct pci
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# define ssb_pcihost_resume NULL
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#endif /* CONFIG_PM */
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-static int ssb_pcihost_probe(struct pci_dev *dev,
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- const struct pci_device_id *id)
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+static int __devinit ssb_pcihost_probe(struct pci_dev *dev,
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+ const struct pci_device_id *id)
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{
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struct ssb_bus *ssb;
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int err = -ENOMEM;
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@@ -110,7 +110,7 @@ static void ssb_pcihost_remove(struct pc
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pci_set_drvdata(dev, NULL);
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}
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-int ssb_pcihost_register(struct pci_driver *driver)
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+int __devinit ssb_pcihost_register(struct pci_driver *driver)
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{
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driver->probe = ssb_pcihost_probe;
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driver->remove = ssb_pcihost_remove;
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--- a/drivers/ssb/scan.c
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+++ b/drivers/ssb/scan.c
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@@ -310,8 +310,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
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} else {
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if (bus->bustype == SSB_BUSTYPE_PCI) {
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bus->chip_id = pcidev_to_chipid(bus->host_pci);
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- pci_read_config_byte(bus->host_pci, PCI_REVISION_ID,
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- &bus->chip_rev);
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+ bus->chip_rev = bus->host_pci->revision;
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bus->chip_package = 0;
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} else {
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bus->chip_id = 0x4710;
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--- a/include/linux/ssb/ssb.h
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+++ b/include/linux/ssb/ssb.h
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@@ -27,6 +27,8 @@ struct ssb_sprom {
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u8 et1mdcport; /* MDIO for enet1 */
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u8 board_rev; /* Board revision number from SPROM. */
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u8 country_code; /* Country Code */
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+ u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */
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+ u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
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u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
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u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
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u16 pa0b0;
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@@ -99,7 +101,7 @@ struct ssb_sprom {
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struct ssb_boardinfo {
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u16 vendor;
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u16 type;
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- u16 rev;
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+ u8 rev;
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};
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