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446 lines
11 KiB
446 lines
11 KiB
/*
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* Broadcom BCM63xx SPI controller support
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*
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* Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the
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* Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_bitbang.h>
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#include <linux/gpio.h>
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#include <linux/completion.h>
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#include <linux/err.h>
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#include <bcm63xx_io.h>
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#include <bcm63xx_regs.h>
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#include <bcm63xx_dev_spi.h>
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#define PFX KBUILD_MODNAME
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#define DRV_VER "0.1.2"
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struct bcm63xx_spi {
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/* bitbang has to be first */
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struct spi_bitbang bitbang;
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struct completion done;
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void __iomem *regs;
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int irq;
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/* Platform data */
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u32 speed_hz;
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unsigned fifo_size;
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/* Data buffers */
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const unsigned char *tx_ptr;
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unsigned char *rx_ptr;
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int remaining_bytes;
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struct clk *clk;
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struct resource *ioarea;
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struct platform_device *pdev;
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};
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static void bcm63xx_spi_chipselect(struct spi_device *spi, int is_on)
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{
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struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
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u16 val;
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val = bcm_spi_readw(bs->regs, SPI_CMD);
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if (is_on == BITBANG_CS_INACTIVE)
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val |= SPI_CMD_NOOP;
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else if (is_on == BITBANG_CS_ACTIVE)
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val |= (1 << spi->chip_select << SPI_CMD_DEVICE_ID_SHIFT);
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bcm_spi_writew(val, bs->regs, SPI_CMD);
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}
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static int bcm63xx_spi_setup_transfer(struct spi_device *spi,
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struct spi_transfer *t)
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{
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u8 bits_per_word;
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u8 clk_cfg;
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u32 hz;
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unsigned int div;
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struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
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bits_per_word = (t) ? t->bits_per_word : spi->bits_per_word;
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hz = (t) ? t->speed_hz : spi->max_speed_hz;
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if (bits_per_word != 8) {
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dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
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__func__, bits_per_word);
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return -EINVAL;
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}
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if (spi->chip_select > spi->master->num_chipselect) {
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dev_err(&spi->dev, "%s, unsupported slave %d\n",
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__func__, spi->chip_select);
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return -EINVAL;
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}
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/* Check clock setting */
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div = (bs->speed_hz / hz);
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switch (div) {
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case 2:
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clk_cfg = SPI_CLK_25MHZ;
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break;
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case 4:
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clk_cfg = SPI_CLK_12_50MHZ;
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break;
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case 8:
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clk_cfg = SPI_CLK_6_250MHZ;
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break;
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case 16:
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clk_cfg = SPI_CLK_3_125MHZ;
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break;
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case 32:
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clk_cfg = SPI_CLK_1_563MHZ;
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break;
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case 128:
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clk_cfg = SPI_CLK_0_781MHZ;
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break;
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case 64:
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default:
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/* Set to slowest mode for compatibility */
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clk_cfg = SPI_CLK_0_781MHZ;
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break;
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}
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bcm_spi_writeb(clk_cfg, bs->regs, SPI_CLK_CFG);
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dev_dbg(&spi->dev, "Setting clock register to %d (hz %d, cmd %02x)\n",
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div, hz, clk_cfg);
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return 0;
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}
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/* the spi->mode bits understood by this driver: */
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#define MODEBITS (SPI_CPOL | SPI_CPHA)
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static int bcm63xx_spi_setup(struct spi_device *spi)
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{
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struct spi_bitbang *bitbang;
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struct bcm63xx_spi *bs;
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int retval;
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bs = spi_master_get_devdata(spi->master);
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bitbang = &bs->bitbang;
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if (!spi->bits_per_word)
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spi->bits_per_word = 8;
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if (spi->mode & ~MODEBITS) {
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dev_err(&spi->dev, "%s, unsupported mode bits %x\n",
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__func__, spi->mode & ~MODEBITS);
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return -EINVAL;
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}
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retval = bcm63xx_spi_setup_transfer(spi, NULL);
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if (retval < 0) {
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dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
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spi->mode & ~MODEBITS);
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return retval;
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}
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dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n",
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__func__, spi->mode & MODEBITS, spi->bits_per_word, 0);
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return 0;
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}
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/* Fill the TX FIFO with as many bytes as possible */
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static void bcm63xx_spi_fill_tx_fifo(struct bcm63xx_spi *bs)
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{
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u8 tail;
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/* Fill the Tx FIFO with as many bytes as possible */
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tail = bcm_spi_readb(bs->regs, SPI_MSG_TAIL);
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while ((tail < bs->fifo_size) && (bs->remaining_bytes > 0)) {
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if (bs->tx_ptr)
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bcm_spi_writeb(*bs->tx_ptr++, bs->regs, SPI_MSG_DATA);
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else
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bcm_spi_writeb(0, bs->regs, SPI_MSG_DATA);
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bs->remaining_bytes--;
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tail = bcm_spi_readb(bs->regs, SPI_MSG_TAIL);
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}
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}
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static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
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{
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struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
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u8 msg_ctl;
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u16 cmd;
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dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n",
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t->tx_buf, t->rx_buf, t->len);
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/* Transmitter is inhibited */
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bs->tx_ptr = t->tx_buf;
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bs->rx_ptr = t->rx_buf;
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bs->remaining_bytes = t->len;
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init_completion(&bs->done);
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bcm63xx_spi_fill_tx_fifo(bs);
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/* Enable the command done interrupt which
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* we use to determine completion of a command */
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bcm_spi_writeb(SPI_INTR_CMD_DONE, bs->regs, SPI_INT_MASK);
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/* Fill in the Message control register */
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msg_ctl = bcm_spi_readb(bs->regs, SPI_MSG_CTL);
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msg_ctl |= (t->len << SPI_BYTE_CNT_SHIFT);
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msg_ctl |= (SPI_FD_RW << SPI_MSG_TYPE_SHIFT);
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bcm_spi_writeb(msg_ctl, bs->regs, SPI_MSG_CTL);
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/* Issue the transfer */
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cmd = bcm_spi_readb(bs->regs, SPI_CMD);
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cmd |= SPI_CMD_START_IMMEDIATE;
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cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT);
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bcm_spi_writeb(cmd, bs->regs, SPI_CMD);
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wait_for_completion(&bs->done);
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/* Disable the CMD_DONE interrupt */
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bcm_spi_writeb(~(SPI_INTR_CMD_DONE), bs->regs, SPI_INT_MASK);
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return t->len - bs->remaining_bytes;
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}
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/* This driver supports single master mode only. Hence
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* CMD_DONE is the only interrupt we care about
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*/
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static irqreturn_t bcm63xx_spi_interrupt(int irq, void *dev_id)
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{
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struct spi_master *master = (struct spi_master *)dev_id;
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struct bcm63xx_spi *bs = spi_master_get_devdata(master);
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u8 intr;
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u16 cmd;
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/* Read interupts and clear them immediately */
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intr = bcm_spi_readb(bs->regs, SPI_INT_STATUS);
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bcm_spi_writeb(SPI_INTR_CLEAR_ALL, bs->regs, SPI_INT_STATUS);
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/* A tansfer completed */
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if (intr & SPI_INTR_CMD_DONE) {
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u8 rx_empty;
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rx_empty = bcm_spi_readb(bs->regs, SPI_ST);
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/* Read out all the data */
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while ((rx_empty & SPI_RX_EMPTY) == 0) {
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u8 data;
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data = bcm_spi_readb(bs->regs, SPI_RX_DATA);
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if (bs->rx_ptr)
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*bs->rx_ptr++ = data;
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rx_empty = bcm_spi_readb(bs->regs, SPI_RX_EMPTY);
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}
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/* See if there is more data to send */
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if (bs->remaining_bytes > 0) {
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bcm63xx_spi_fill_tx_fifo(bs);
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/* Start the transfer */
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cmd = bcm_spi_readb(bs->regs, SPI_CMD);
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cmd |= SPI_CMD_START_IMMEDIATE;
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cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT);
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bcm_spi_writeb(cmd, bs->regs, SPI_CMD);
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} else
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complete(&bs->done);
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}
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return IRQ_HANDLED;
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}
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static int __init bcm63xx_spi_probe(struct platform_device *pdev)
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{
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struct resource *r;
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struct bcm63xx_spi_pdata *pdata = pdev->dev.platform_data;
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int irq;
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struct spi_master *master;
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struct clk *clk;
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struct bcm63xx_spi *bs;
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int ret;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!r) {
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ret = -ENXIO;
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goto out;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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ret = -ENXIO;
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goto out;
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}
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clk = clk_get(&pdev->dev, "spi");
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if (IS_ERR(clk)) {
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dev_err(&pdev->dev, "No clock for device\n");
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ret = -ENODEV;
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goto out;
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}
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master = spi_alloc_master(&pdev->dev, sizeof(struct bcm63xx_spi));
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if (!master) {
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ret = -ENOMEM;
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goto out_free;
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}
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bs = spi_master_get_devdata(master);
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bs->bitbang.master = spi_master_get(master);
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bs->bitbang.chipselect = bcm63xx_spi_chipselect;
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bs->bitbang.setup_transfer = bcm63xx_spi_setup_transfer;
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bs->bitbang.txrx_bufs = bcm63xx_txrx_bufs;
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bs->bitbang.master->setup = bcm63xx_spi_setup;
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init_completion(&bs->done);
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platform_set_drvdata(pdev, master);
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bs->pdev = pdev;
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if (!request_mem_region(r->start,
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r->end - r->start, PFX)) {
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ret = -ENXIO;
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goto out_free;
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}
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bs->regs = ioremap_nocache(r->start, r->end - r->start);
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if (!bs->regs) {
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printk(KERN_ERR PFX " unable to ioremap regs\n");
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ret = -ENOMEM;
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goto out_free;
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}
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bs->irq = irq;
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bs->clk = clk;
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bs->fifo_size = pdata->fifo_size;
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ret = request_irq(irq, bcm63xx_spi_interrupt, 0,
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pdev->name, master);
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if (ret) {
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printk(KERN_ERR PFX " unable to request irq\n");
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goto out_unmap;
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}
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master->bus_num = pdata->bus_num;
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master->num_chipselect = pdata->num_chipselect;
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bs->speed_hz = pdata->speed_hz;
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/* Initialize hardware */
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clk_enable(bs->clk);
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bcm_spi_writew(SPI_CMD_HARD_RESET, bs->regs, SPI_CMD);
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bcm_spi_writeb(SPI_INTR_CLEAR_ALL, bs->regs, SPI_INT_MASK);
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dev_info(&pdev->dev, " at 0x%08x (irq %d, FIFOs size %d) v%s\n",
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r->start, irq, bs->fifo_size, DRV_VER);
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ret = spi_bitbang_start(&bs->bitbang);
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if (ret) {
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dev_err(&pdev->dev, "spi_bitbang_start FAILED\n");
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goto out_reset_hw;
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}
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return ret;
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out_reset_hw:
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clk_disable(clk);
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free_irq(irq, master);
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out_unmap:
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iounmap(bs->regs);
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out_free:
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clk_put(clk);
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spi_master_put(master);
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out:
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return ret;
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}
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static int __exit bcm63xx_spi_remove(struct platform_device *pdev)
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{
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struct spi_master *master = platform_get_drvdata(pdev);
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struct bcm63xx_spi *bs = spi_master_get_devdata(master);
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spi_bitbang_stop(&bs->bitbang);
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clk_disable(bs->clk);
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clk_put(bs->clk);
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free_irq(bs->irq, master);
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iounmap(bs->regs);
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platform_set_drvdata(pdev, 0);
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spi_master_put(bs->bitbang.master);
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return 0;
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}
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#ifdef CONFIG_PM
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static int bcm63xx_spi_suspend(struct platform_device *pdev, pm_message_t mesg)
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{
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struct spi_master *master = platform_get_drvdata(pdev);
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struct bcm63xx_spi *bs = spi_master_get_devdata(master);
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clk_disable(bs->clk);
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return 0;
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}
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static int bcm63xx_spi_resume(struct platform_device *pdev)
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{
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struct bcm63xx_spi *bs = spi_master_get_devdata(master);
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struct bcm63xx_spi *bs = spi_master_get_devdata(master);
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clk_enable(bs->clk);
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return 0;
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}
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#else
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#define bcm63xx_spi_suspend NULL
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#define bcm63xx_spi_resume NULL
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#endif
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static struct platform_driver bcm63xx_spi_driver = {
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.driver = {
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.name = "bcm63xx-spi",
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.owner = THIS_MODULE,
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},
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.probe = bcm63xx_spi_probe,
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.remove = bcm63xx_spi_remove,
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.suspend = bcm63xx_spi_suspend,
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.resume = bcm63xx_spi_resume,
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};
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static int __init bcm63xx_spi_init(void)
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{
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return platform_driver_register(&bcm63xx_spi_driver);
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}
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static void __exit bcm63xx_spi_exit(void)
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{
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platform_driver_unregister(&bcm63xx_spi_driver);
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}
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module_init(bcm63xx_spi_init);
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module_exit(bcm63xx_spi_exit);
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MODULE_ALIAS("platform:bcm63xx_spi");
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MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
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MODULE_DESCRIPTION("Broadcom BCM63xx SPI Controller driver");
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MODULE_LICENSE("GPL");
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MODULE_VERSION(DRV_VER);
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