This PR adds support for TP-Link TL-WR842N-v2 router which is supported by ar71xx to ath79.
This is a low cost model with following specs:
CPU: Atheros AR9341 SoC
RAM: 32 MB DDR1
Flash: 8 MB NOR SPI
Switch: Internal AR9341 5 port 10/100 Mbit
Ports: 5x 10/100 Mbit(1x WAN, 4x LAN)
USB: 1x USB2.0
WLAN: 2.4 GHZ AR9341
Installation:
Simply flash the factory image through stock firmware WEB UI.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use diag.sh version used for apm821xx, ipq40xx and ipq806x, which
supports different leds for the different boot states.
The existing led sequences should be the same as before.
Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
[reword commit message]
Signed-off-by: Mathias Kresin <dev@kresin.me>
This adds PLL settings for the ethernet ports of the TP-Link TL-WR1043
v2/v3 and the Openmesh OM5P-AC-v2.
We also change the PLL-settings in the qca9557.dtsi to match the ones
used as default on the ar71xx target.
As of 4b9680f138 those devices have broken ethernet ports as the default
PLL settings defined in the QCA9557.dtsi are applied which are off for
those devices.
Signed-off-by: David Bauer <mail@david-bauer.net>
Fix all issues found by the devicetree compiler like wrong address/size
cells as well as wrong/missing/superfluous unit addresses.
Signed-off-by: Mathias Kresin <dev@kresin.me>
phy-handle is used to poll link status. They are useless when
we need fixed-link on these interfaces.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This target can automatically detect the correct memory size and we've
been using it for long in ar71xx.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>