5 Commits (c4a419b44585a01e9fe9408d1f0493ed1a5dc0af)

Author SHA1 Message Date
Gabor Juhos 40a5f5c16e ar71xx: define NAND controller base address and register size for AR934X/QCA955x 12 years ago
Gabor Juhos f4be8a76de ar71xx: fix CPU/DDR frequency calculation for SRIF PLLs on AR934x 12 years ago
Gabor Juhos d1b237b335 ar71xx: add initial support for the QCA955X SoCs 12 years ago
Gabor Juhos 7284cf73d6 ar71xx: refactor PCI code to allow registering multiple PCI controllers 12 years ago
Felix Fietkau 5d364d0ca1 ar71xx: add support for reading the MAC address from OTP ROM on AR933x 13 years ago