Synopsys DesignWare HSDK (which stands for ARC HS
Development Kit) is the latest and greatest development
platform that sports quad-core ARC HS38 in real silicon.
Most noticeable features of the board are:
* Quad-core ARC HS38 CPU running at 1GHz
* 4Gb of DDR
* Built-in Vivante GPU (well supported via open source
Etnaviv drivers)
* Built-in Wi-Fi/Bluetooth module (RedPine RS-9113)
And as usual we have:
* [micro] SD-card slot
* 2 USB 2.0 ports
* 1Gbit Ethernet port
* Built-in Digilent JTAG probe
* Serial port accessible via micro-USB port
For more information about HSDK board visit:
https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit
Signed-off-by: Evgeniy Didin <Evgeniy.Didin@synopsys.com>
CC: Alexey Brodkin <abrodkin@synopsys.com>
CC: Hauke Mehrtens <hauke@hauke-m.de>
CC: John Crispin <john@phrozen.org>
As it turned out we may actually build both initramfs and
SD-based images in one run with just a small tweak in
existing image/Makefile and so we do here.
We're back with one "generic" target for all ARC HS38-based bords.
Kudos to John for his patience and very helpful tips!
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jo-Philipp Wich <jo@mein.io>
Historically on ARC we started from initramfs-based images because:
a) It was much easier to debug especially when toolchain and other
components were changing quite dynamically
b) It was our usual approach for embedded Linux
But now with ARC port of Lede/OpenWRT getting more stable and mature
we're ready for more real-life scenarios with FS permanently stored
on SD-card. This essentially benefits from ability to setup devices
that survive reboots with all settings and extra packages kept in place.
Still we keep an ability to build images with initramfs.
This allows us to use storage-less simulators for testing still.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: John Crispin <john@phrozen.org>
As support of ARC HS38 in OpenWRT/Lede matures we don't need
debug-only output binaries any longer, so purging vmlinux for
AXS10x boards.
As for uImage for nSIM it makes completely no sense because there's no
way to run U-Boot on nSIM.
So we remove add_archs38_XXX scripts making code more compact and
cleaner.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Instead of using off-the-tree .dts files for ARC boards we're
switching to use in-tree ones. And for that to work properly
we apply upstream patch that adds currently missing "model"
property.
Upstream patch and discussion could be found here:
http://lists.infradead.org/pipermail/linux-snps-arc/2016-August/001394.html
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: John Crispin <john@phrozen.org>
It is used by a core build template, so the variable should be
initialized and added to DEVICE_VARS in the core.
Same for DEVICE_DTS_DIR
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Initially for ARC we were building vmlinux images because it
was both simpler and more convenient to debug Linux kernel
in runt-time via JTAG. Now when base system works quite nice
we may finally use U-Boot for loading the system image as
well. Still we keep building vmlinux images as some of our
boards are development boards and loading images with JTAG
could be at some points very beneficial.
Note for U-Boot header it's required to specify 2 values:
* loading address
* entry point (if it doesn't match loading address)
and in case of ARC entry point (EP) not only differs from
loading address but also changes from build to build due to
initramfs being placed between loading address and text section.
To accommodate that feature we have to calculate EP after
vmlinux gets built and before call to mkimage.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This patch introduces support of new boards with ARC HS38 cores.
ARC HS38 is a new generation of ARC cores which utilize ARCv2 ISA.
As with ARC770 we're addind support for 2 boards for now:
[1] Synopsys SDP board (AXS103)
This is the same base-board as in AXS101 but with
FPGA-based CPU-tile where ARCHs38 core is implemented.
[2] nSIM
Again this is the same simulation engine but configured for
new instruction set and features of new CPU.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Jo-Philipp Wich <jow@openwrt.org>
Cc: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 48740
Evgeniy Didin