freifunkist-firmware

hsist

Commit Graph

Author	SHA1	Message	Date
Florian Fainelli	b89c81929e	fix SPI message control handling for BCM6338/6348 BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of 16-bits. We were previously using a 16-bits write which corrupted the first byte of the TX FIFO. Also the message type was always set to Full-duplex even in the case of half-duplex messages. SVN-Revision: 32409	13 years ago

Author

SHA1

Message

Date

Florian Fainelli

b89c81929e

fix SPI message control handling for BCM6338/6348

BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of
16-bits. We were previously using a 16-bits write which corrupted the first
byte of the TX FIFO. Also the message type was always set to Full-duplex even
in the case of half-duplex messages.

SVN-Revision: 32409

13 years ago

1 Commits (9b91c62917650f2a3329d7adb0a4125778bdfc14)