4 Commits (6804bafaddec8f36c7c8fd7b0a5469d35cf8bc7f)

Author SHA1 Message Date
John Crispin 6641024f50 uart_clk on Rt3352F is always 40MHz 12 years ago
Gabor Juhos 1645928135 ramips: rt305x: fix CPU clock detection on RT3352 13 years ago
Gabor Juhos 8cf8ee8f9d ramips: rt305x: rename SYSTEM_CONFIG_* defines to RT305X_SYSCFG_* 13 years ago
Gabor Juhos b0ffa70248 ramips: implement clock API for RT305X 14 years ago