Now when we're switching to FS on SD-card it's necessary to have
full stack of MMC block & FC drivers built-in otherwise kernel won't
be able to mount FS with needed modules.
Also we enable parsing of input parameters passed to the kernel by
U-Boot. Otherwise kernel won't know where to look for command line and
what's worse device tree blob (we had to disable this by default for
cases when kernel is loaded by JTAG and core registers may have
undefined state lading to kernel going bonkers).
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This reverts commit acd41539d6.
There's a fix in upstream that will at some point land in 4.4 stable as
well so we'll get rid of this hack and with the next commit will apply
upstream fix.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
With update of binutils for ARC (this is now based on upstream 2.26)
we noticed issues with loadable kernel modules.
Something like that was happening:
--------------------->8-------------------
mbcache: unknown relocation: 49
insmod: can't insert './mbcache.ko': invalid module format
--------------------->8-------------------
More details could be found in that discussion in binutils mailing list:
http://thread.gmane.org/gmane.comp.gnu.binutils/74662
As of now the simplest work-around is to disable in-kernel unwinder
for now. That will at least allow us to use modules again.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: John Crispin <john@phrozen.org>
This patch introduces support of new boards with ARC HS38 cores.
ARC HS38 is a new generation of ARC cores which utilize ARCv2 ISA.
As with ARC770 we're addind support for 2 boards for now:
[1] Synopsys SDP board (AXS103)
This is the same base-board as in AXS101 but with
FPGA-based CPU-tile where ARCHs38 core is implemented.
[2] nSIM
Again this is the same simulation engine but configured for
new instruction set and features of new CPU.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Jo-Philipp Wich <jow@openwrt.org>
Cc: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 48740
This switch involved:
[1] Regeneration of config (few options went away)
[2] Regeneration of patches so they apply cleanly (different offsets)
[3] Update of .dts files because we now explicitly specify
memory regions in use as opposed to previously used offset
from 0x8000_0000
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Jo-Philipp Wich <jow@openwrt.org>
Cc: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 48240
This patch introduces support of new boards with ARC cores.
[1] Synopsys SDP board
This is a new-generation development board from Synopsys that
consists of base-board and CPU tile-board (which might have a real
ASIC or FPGA with CPU image).
It sports a lot of DesignWare peripherals like GMAC, USB, SPI, I2C
etc and is intended to be used for early development of ARC-based
products.
[2] nSIM
This is a virtual board implemented in Synopsys proprietary
software simulator (even though available for free for open source
community). This board has only serial port as a peripheral and so
it is meant to be used for runtime testing which is especially
useful during bring-up of new tools and platforms.
What's also important ARC cores are very configurable so there're
many variations of options like cache sizes, their line lengths,
additional hardware blocks like multipliers, dividers etc. And this
board could be used to make sure built software still runs on
different HW configurations.
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Jo-Philipp Wich <jow@openwrt.org>
Cc: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
SVN-Revision: 47589
Alexey Brodkin