1 Commits (3f974a954d351bc1f34c39e0ca908a22a2583701)

Author	SHA1	Message	Date
Felix Fietkau	d8655868ca	ramips: fix spurious IRQ7 events when using perf on 4.14 ... Upstream handling of MIPS CPU IRQs is rather hackish and the interrupts are being enabled unconditionally in various places because of legacy code. Performance counter events are routed both through the GIC and through legacy CPU IRQ7 events, causing spurious interrupts. Fix this by disabling IRQ7 when trying to access the performance counter IRQ. Signed-off-by: Felix Fietkau <nbd@nbd.name>	7 years ago