*Enable SMEM MTD parser and its dependencies (SMEM & HW spinlocks) in
the kernel config
*Replaces the MTD layout in DT by the dynamic layout provided by the
SMEM parser for AP148
Using the OF based parser is still possible on platforms which have a
fixed MTD partition layout.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 46658
This change cherry-picks the following 3 changes from linux-next:
*fb7737 hwspinlock/core: add device tree support
*19a0f6 hwspinlock: qcom: Add support for Qualcomm HW Mutex block
*bd5717 hwspinlock: qcom: Correct msb in regmap_field
We're also adding a patch to add the hardware spinlock device nodes on
IPQ806x platforms (033-soc-qcom-Add-sfbp-device-to-IPQ806x-dts.patch).
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 46655
Old bootloader (same ones which have DT disabled) don't perform any PCIe
initialization. The consequence is a freeze during PCIe bring-up on
these old u-boot. Same kernel with a newer bootloaders works fine as
they contain the corresponding PCIe init code.
In this change, we'll add the missing init and make sure the kernel
doesn't rely on some preexisting init to get PCIe to work. That includes
the following changes:
*GPIOs: set function & drive strength
*Clocks: add init code for aux & ref clocks
*PCIe driver: additional init of the hardware controller
Tested 3.18 and 4.1 on an AP148 with bootloader branch 0.0.1
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 46557
PCIe controller nodes are numbers 0/1/2 in the chipset dtsi file, but
the pinmux nodes are numbers 1/2/3. We'll make it consistent by changing
the pinmux numbering to match the controller's one.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 46556
Certain AP148 platforms (and derivative) use bootloaders which did not
have DT enabled.
In order to support these old platforms, we'll now make the following
modifications:
*explicitely add the memory node in the AP148 DT: this used to be added
by new u-boot through a run-time patch mechanism. We'll now add it
explicitely so it works on boots which don't support that feature. New
boots will have the node twice, the second one will be ignored.
*add the zImage generation next to the FIT image for AP148.
Other platforms using non-DT enabled bootloaders may want to leverage
this zImage code to generate their own firmare as well.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 46555
This driver has been cherry-picked and backported from the following
LKML thread:
*https://lkml.org/lkml/2015/5/26/744
It also updates the DT accordingly.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 45831
This include is necessary starting at the PCIe patch, which has a lower
number. So in order to keep the patches consistent, we'll move the
arm-gic include in the first patch who needs it.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 45827
Patch cherry-picked from the following location:
https://chromium-review.googlesource.com/#/c/269931/
Disable the i2c device on gsbi4 and mark gsbi4_h and gsbi4_qup clks as
unused. If they are enabled, clock framework will turn them off at end
of probe. On ipq806x by design gsbi4_qup, gsbi4_h clks and i2c on gsbi4
are meant for RPM usage. So turning them off in kernel is incorrect.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 45728
This change adds PCIe support to IPQ806x based platforms. The driver is
actually cherry-picked from the following LKML thread:
*https://lwn.net/Articles/643086/ (patches 110-111)
We also add here an additional fix to support multiple PCI controllers
on the same platform (patch 112), and to patch the ap148 & dbs149 DTS
files (patch 113).
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 45663
Felix Fietkau