This patch re-enables the reset_ppe() functionality for VR9 targets by using
the new lantiq rcu subsystem. The reset sequence in the reset_ppe() function
was taken from the ppa datapath driver of lantiq UGW 7.4.1.
Additionally it adds the required reset definitions to the vr9 dtsi file.
It also prepares the reset_ppe() function calls for the other lantiq targets.
This feature is needed to be able to switch between ltq-atm/ltq-ptm driver
in ATM/PTM Auto-Mode at runtime.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
We need to reset the GPHYs on reboot as well. Otherwise the bootloader
might have issues to reset/find the GPHYs.
Signed-off-by: Mathias Kresin <dev@kresin.me>
The Lantiq XRX200 aka VR9 doesn't have an asc0. Instead,
there is an USIF module which can either be an UART or a
SPI Controller.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
Updated the devicetree source files to make use of the following
upstreamed drivers:
- xrx200 ethernet phy
- reset controller unit
- dwc2
- fpi
Use our custom xrx200 ethernet phy compatible to support boards, which
have switched the vr9 revision during lifetime, with a single devicetree
source file.
By switching to the dwc2 driver + usb phy framework, we don't need to used
our custom gpio power patch and can use a fixed regulator instead.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Mathias Kresin <dev@kresin.me>
This just copies the patches, configuration and dts files into the
directories hich are used for kernel 4.14.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Move the devicetree source files to a kernel specific directory in
preparation of adding kernel 4.14 support.
Rename the subtarget kernel config files to match a specific kernel
version.
Signed-off-by: Mathias Kresin <dev@kresin.me>
The following patches were dropped because they are already applied
upstream:
0012-pinctrl-lantiq-fix-up-pinmux.patch
0013-MTD-lantiq-xway-fix-invalid-operator.patch
0014-MTD-lantiq-xway-the-latched-command-should-be-persis.patch
0015-MTD-lantiq-xway-remove-endless-loop.patch
0016-MTD-lantiq-xway-add-missing-write_buf-and-read_buf-t.patch
0017-MTD-xway-fix-nand-locking.patch
0044-pinctrl-lantiq-introduce-new-dedicated-devicetree-bi.patch
0045-pinctrl-lantiq-Fix-GPIO-Setup-of-GPIO-Port3.patch
0046-pinctrl-lantiq-2-pins-have-the-wrong-mux-list.patch
0047-irq-fixes.patch
0047-mtd-plat-nand-pass-of-node.patch
0060-usb-dwc2-Add-support-for-Lantiq-ARX-and-XRX-SoCs.patch
0120-MIPS-lantiq-add-support-for-device-tree-file-from-bo.patch
0121-MIPS-lantiq-make-it-possible-to-build-in-no-device-t.patch
122-MIPS-store-the-appended-dtb-address-in-a-variable.patch
The PHY driver was reduced to the code adding the LED configuration,
the rest is already upstream:
0023-NET-PHY-adds-driver-for-lantiq-PHY11G.patch
The SPI driver was replaced with the version pending for upstream
inclusion:
New driver:
0090-spi-add-transfer_status-callback.patch
0091-spi-lantiq-ssc-add-support-for-Lantiq-SSC-SPI-controller.patch
Old driver:
0100-spi-add-support-for-Lantiq-SPI-controller.patch
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This adds USB initialization fixes for Danube, Amazon SE and xrx300 and
should fix the clock on at least Danube which hopefully closes FS#351.
The xrx200 usb driver now uses more memory for the dwc2 fifos, this was
increased in the chip compared to ar9.
This is based in part on the vendor documentation and the vendor code
base as a reference.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Use devicetree's /chosen/stdout-path instead of the kernel command line
(embedded in the .dts-files) to specify the serial console. Using the
chosen node is recommended on devicetree based platforms.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
All compiled device tree files not mentioned are binary identical to the
former ones.
Fix the obvious decimal/hex confusion for the power key of ramips/M2M.dts.
Due to the include of the input binding header, the BTN_* node names in:
- ramips/GL-MT300A.dts
- ramips/GL-MT300N.dts
- ramips/GL-MT750.dts
- ramips/Timecloud.dts
will be changed by the compiler to the numerical equivalent.
Move the binding include of lantiq boards to the file where they are
used the first time to hint the user where the values do come from.
Signed-off-by: Mathias Kresin <dev@kresin.me>
- remove not existing properties
- remove properties having the same values as the included dtsi
- remove nodes which are disabled in the included dtsi and not enabled
in dts
- replace the deprecated pinctrl-* compatible strings
- use the same labels for nodes as the included dtsi
- move common used vr9 pci properties to vr9.dtsi
- remove the unused stp node from HomeHub 2B devcie tree source file
- fix spaces vs. tabs and remove superfluous linebreaks
Signed-off-by: Mathias Kresin <dev@kresin.me>
(required not-distributable firmware blob - dump it by yourself from original firmware)
Signed-off-by: Eddi De Pieri <eddi@depieri.net>
(cherry picked from commit 8d924d43c0ea6839a3a33e54982e8da48b736001)
Modified after cherry-pick:
compatible attribute
Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
The device tree file of ARV752DPW uses numbers/hex values for gpio states and input event codes.
This cleans it up and uses the available macros from header files. This way the functions are easier to read and comprehend.
Signed-off-by: Andreas Eberlein <foodeas@aeberlein.de>
[sanitize all device tree files]
Signed-off-by: Mathias Kresin <dev@kresin.me>
This removes a lot of duplicate register and interrupt definitions by
moving the xrx200-net definition to vr9.dtsi and making all devices re-
use it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48547
Compared to the "old" driver:
- Each device must assign a pinctrl setting to the SPI node to allow the
new SPI driver to configure the SPI pins.
While here we are also using separate input and output settings so we
are independent of whether the bootloader configures the pins correctly.
- We use the new "compatible" strings to make the driver choose the
correct number of chip-selects for each SoC.
- The new driver starts counting the chip-selects at 1 (instead of 0, like
the old one did). Thus we have to adjust the devices accordingly.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48293
This allows devices to use SPI without having to re-define (and thus
duplicating) the whole SPI node.
By default SPI is disabled (as before) because only few devices need it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48286
After the latest pinctrl backports there are only 50 (instead of 56 as
before) GPIOs/pins exported (thus the first GPIO on VRX200 SoCs is now
462, before it was 456). This means that any hardcoded GPIOs have to be
adjusted.
This broke the PCIe driver (which seems to be the only driver which uses
hardcoded GPIO numbers), it only reports:
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
pcie_rc_initialize link up failed!!!!!
To prevent more of these issues in the future we remove the hardcoded
PCIe reset GPIO definition and simply pass it via device-tree (like the
PCI driver does).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48285
These were introduced in upstream commit
be14811c03cf "pinctrl/lantiq: introduce new dedicated devicetree
bindings" and finally allow us to use the individual pins within our dts
(for example spi_clk, etc.).
Please note that this changes the number of GPIOs which are available for
some SoCs. VRX200 SoCs for example only have 50 pins, but previously 56
pins were exposed. This means that all places which are using hardcoded
GPIO numbers (which are not passed via device-tree) need to be adjusted
(because the first GPIO number is now 462, instead of 456).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48284
linux 4.4 (since commit 08b3c894e56580b8ed3e601212a25bda974c3cc2
"MIPS: lantiq: Disable xbar fpi burst mode") requires that the xbar is
defined in the .dts of vrx200 (VR9) SoCs.
SVN-Revision: 48056
Newer DSL driver versions depend on the address information.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 46221
Here the device tree entry for ifxhcd is listed as compatible with one
supported in dwc2 (after patching the dwc driver appropriately).
A second entry is added to support the second core of the hcd. This
entry is listed to be compatible with only dwc2. Done this way there
should be backwards support for both hcd drivers (ltq-hcd and dwc2)
Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>
SVN-Revision: 44676
Martin Schiller