ramips: DTS modifications

This commit makes the following modifications to ramips dts files:
1. Add clkctrl node to all dtsi files (although not used for now)
2. Add clocks and clock-names properties to some nodes (usbphy, pci)
3. Add usbphy node for rt3050 (although not used for now)
4. Add clock-frequency to uart nodes in mt7621.dtsi and mt7628an.dtsi

These modifications, although not fully used at the moment, will make
it easier for FreeBSD to adopt and use LEDE ramips dts files with
minimal changes for easier maintenance.

Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
master
Stanislav Galabov 9 years ago committed by John Crispin
parent b8ab6af1a9
commit ffaaa6788a
  1. 11
      target/linux/ramips/dts/mt7620a.dtsi
  2. 8
      target/linux/ramips/dts/mt7620n.dtsi
  3. 11
      target/linux/ramips/dts/mt7621.dtsi
  4. 21
      target/linux/ramips/dts/mt7628an.dtsi
  5. 5
      target/linux/ramips/dts/rt2880.dtsi
  6. 13
      target/linux/ramips/dts/rt3050.dtsi
  7. 7
      target/linux/ramips/dts/rt3352.dtsi
  8. 7
      target/linux/ramips/dts/rt3883.dtsi
  9. 7
      target/linux/ramips/dts/rt5350.dtsi

@ -396,12 +396,20 @@
#reset-cells = <1>;
};
clkctrl: clkctrl {
compatible = "ralink,rt2880-clock";
#clock-cells = <1>;
};
usbphy: usbphy {
compatible = "mediatek,mt7620-usbphy";
#phy-cells = <1>;
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
clocks = <&clkctrl 22 &clkctrl 25>;
clock-names = "host", "device";
};
ethernet: ethernet@10100000 {
@ -499,6 +507,9 @@
resets = <&rstctrl 26>;
reset-names = "pcie0";
clocks = <&clkctrl 26>;
clock-names = "pcie0";
interrupt-parent = <&cpuintc>;
interrupts = <4>;

@ -255,12 +255,20 @@
#reset-cells = <1>;
};
clkctrl: clkctrl {
compatible = "ralink,rt2880-clock";
#clock-cells = <1>;
};
usbphy: usbphy {
compatible = "mediatek,mt7620-usbphy";
#phy-cells = <1>;
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
clocks = <&clkctrl 22 &clkctrl 25>;
clock-names = "host", "device";
};
ethernet: ethernet@10100000 {

@ -109,6 +109,7 @@
reg = <0xc00 0x100>;
clocks = <&sysclock>;
clock-frequency = <50000000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
@ -241,6 +242,11 @@
#reset-cells = <1>;
};
clkctrl: clkctrl {
compatible = "ralink,rt2880-clock";
#clock-cells = <1>;
};
sdhci: sdhci@1E130000 {
compatible = "ralink,mt7620-sdhci";
reg = <0x1E130000 0x4000>;
@ -349,6 +355,11 @@
status = "okay";
resets = <&rstctrl 24 &rstctrl 25 &rstctrl 26>;
reset-names = "pcie0", "pcie1", "pcie2";
clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;
clock-names = "pcie0", "pcie1", "pcie2";
pcie0 {
reg = <0x0000 0 0 0 0>;

@ -166,6 +166,8 @@
reg-io-width = <4>;
no-loopback-test;
clock-frequency = <40000000>;
resets = <&rstctrl 12>;
reset-names = "uartl";
@ -184,6 +186,8 @@
reg-io-width = <4>;
no-loopback-test;
clock-frequency = <40000000>;
resets = <&rstctrl 19>;
reset-names = "uart1";
@ -204,6 +208,8 @@
reg-io-width = <4>;
no-loopback-test;
clock-frequency = <40000000>;
resets = <&rstctrl 20>;
reset-names = "uart2";
@ -344,6 +350,11 @@
#reset-cells = <1>;
};
clkctrl: clkctrl {
compatible = "ralink,rt2880-clock";
#clock-cells = <1>;
};
usbphy: usbphy@10120000 {
compatible = "ralink,mt7628an-usbphy", "mediatek,mt7620-usbphy";
reg = <0x10120000 0x4000>;
@ -351,6 +362,8 @@
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
clocks = <&clkctrl 22 &clkctrl 25>;
clock-names = "host", "device";
};
sdhci: sdhci@10130000 {
@ -420,12 +433,14 @@
#address-cells = <3>;
#size-cells = <2>;
resets = <&rstctrl 26>;
reset-names = "pcie0";
interrupt-parent = <&cpuintc>;
interrupts = <4>;
resets = <&rstctrl 26 &rstctrl 27>;
reset-names = "pcie0", "pcie1";
clocks = <&clkctrl 26 &clkctrl 27>;
clock-names = "pcie0", "pcie1";
status = "disabled";
device_type = "pci";

@ -158,6 +158,11 @@
#reset-cells = <1>;
};
clkctrl: clkctrl {
compatible = "ralink,rt2880-clock";
#clock-cells = <1>;
};
ethernet: ethernet@400000 {
compatible = "ralink,rt2880-eth";
reg = <0x00400000 0x10000>;

@ -215,6 +215,19 @@
#reset-cells = <1>;
};
clkctrl: clkctrl {
compatible = "ralink,rt2880-clock";
#clock-cells = <1>;
};
usbphy: usbphy {
compatible = "ralink,rt3050-usbphy";
resets = <&rstctrl 22>;
reset-names = "host";
clocks = <&clkctrl 18>;
clock-names = "host";
};
ethernet: ethernet@10100000 {
compatible = "ralink,rt3050-eth";
reg = <0x10100000 0x10000>;

@ -229,6 +229,11 @@
#reset-cells = <1>;
};
clkctrl: clkctrl {
compatible = "ralink,rt2880-clock";
#clock-cells = <1>;
};
ethernet: ethernet@10100000 {
compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
reg = <0x10100000 0x10000>;
@ -259,6 +264,8 @@
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
clocks = <&clkctrl 18 &clkctrl 20>;
clock-names = "host", "device";
};
wmac: wmac@10180000 {

@ -272,6 +272,11 @@
#reset-cells = <1>;
};
clkctrl: clkctrl {
compatible = "ralink,rt2880-clock";
#clock-cells = <1>;
};
pci: pci@10140000 {
compatible = "ralink,rt3883-pci";
reg = <0x10140000 0x20000>;
@ -364,6 +369,8 @@
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
clocks = <&clkctrl 22 &clkctrl 25>;
clock-names = "host", "device";
};
wmac: wmac@10180000 {

@ -267,12 +267,19 @@
#reset-cells = <1>;
};
clkctrl: clkctrl {
compatible = "ralink,rt2880-clock";
#clock-cells = <1>;
};
usbphy: usbphy {
compatible = "ralink,rt3352-usbphy";
#phy-cells = <1>;
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
clocks = <&clkctrl 18>;
clock-names = "host";
};
ethernet: ethernet@10100000 {

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