atheros: move AR2315 misc IRQ dispatching to separate function

Align code with AR5312 realization.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 41692
master
Felix Fietkau 11 years ago
parent 5c030111a9
commit fceb7f7045
  1. 47
      target/linux/atheros/patches-3.10/100-board.patch
  2. 15
      target/linux/atheros/patches-3.10/105-ar2315_pci.patch

@ -2154,7 +2154,7 @@
+
--- /dev/null
+++ b/arch/mips/ar231x/ar2315.c
@@ -0,0 +1,656 @@
@@ -0,0 +1,661 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
@ -2222,6 +2222,28 @@
+ do_IRQ(AR531X_GPIO_IRQ_BASE + bit);
+}
+
+static void
+ar2315_misc_irq_dispatch(void)
+{
+ unsigned int misc_intr = ar231x_read_reg(AR2315_ISR) &
+ ar231x_read_reg(AR2315_IMR);
+
+ if (misc_intr & AR2315_ISR_SPI)
+ do_IRQ(AR531X_MISC_IRQ_SPI);
+ else if (misc_intr & AR2315_ISR_TIMER)
+ do_IRQ(AR531X_MISC_IRQ_TIMER);
+ else if (misc_intr & AR2315_ISR_AHB)
+ do_IRQ(AR531X_MISC_IRQ_AHB_PROC);
+ else if (misc_intr & AR2315_ISR_GPIO)
+ ar2315_gpio_irq();
+ else if (misc_intr & AR2315_ISR_UART0)
+ do_IRQ(AR531X_MISC_IRQ_UART0);
+ else if (misc_intr & AR2315_ISR_WD) {
+ ar231x_write_reg(AR2315_ISR, AR2315_ISR_WD);
+ do_IRQ(AR531X_MISC_IRQ_WATCHDOG);
+ } else
+ do_IRQ(AR531X_MISC_IRQ_NONE);
+}
+
+/*
+ * Called when an interrupt is received, this function
@ -2240,26 +2262,9 @@
+ do_IRQ(AR2315_IRQ_WLAN0_INTRS);
+ else if (pending & CAUSEF_IP4)
+ do_IRQ(AR2315_IRQ_ENET0_INTRS);
+ else if (pending & CAUSEF_IP2) {
+ unsigned int misc_intr = ar231x_read_reg(AR2315_ISR) &
+ ar231x_read_reg(AR2315_IMR);
+
+ if (misc_intr & AR2315_ISR_SPI)
+ do_IRQ(AR531X_MISC_IRQ_SPI);
+ else if (misc_intr & AR2315_ISR_TIMER)
+ do_IRQ(AR531X_MISC_IRQ_TIMER);
+ else if (misc_intr & AR2315_ISR_AHB)
+ do_IRQ(AR531X_MISC_IRQ_AHB_PROC);
+ else if (misc_intr & AR2315_ISR_GPIO)
+ ar2315_gpio_irq();
+ else if (misc_intr & AR2315_ISR_UART0)
+ do_IRQ(AR531X_MISC_IRQ_UART0);
+ else if (misc_intr & AR2315_ISR_WD) {
+ ar231x_write_reg(AR2315_ISR, AR2315_ISR_WD);
+ do_IRQ(AR531X_MISC_IRQ_WATCHDOG);
+ } else
+ do_IRQ(AR531X_MISC_IRQ_NONE);
+ } else if (pending & CAUSEF_IP7)
+ else if (pending & CAUSEF_IP2)
+ ar2315_misc_irq_dispatch();
+ else if (pending & CAUSEF_IP7)
+ do_IRQ(AR531X_IRQ_CPU_CLOCK);
+}
+

@ -257,8 +257,8 @@
+ default y
--- a/arch/mips/ar231x/ar2315.c
+++ b/arch/mips/ar231x/ar2315.c
@@ -65,6 +65,27 @@ static inline void ar2315_gpio_irq(void)
do_IRQ(AR531X_GPIO_IRQ_BASE + bit);
@@ -88,6 +88,28 @@ ar2315_misc_irq_dispatch(void)
do_IRQ(AR531X_MISC_IRQ_NONE);
}
+#ifdef CONFIG_ATHEROS_AR2315_PCI
@ -282,10 +282,11 @@
+ }
+}
+#endif /* CONFIG_ATHEROS_AR2315_PCI */
+
/*
* Called when an interrupt is received, this function
@@ -83,6 +104,10 @@ ar2315_irq_dispatch(void)
* determines exactly which interrupt it was, and it
@@ -105,6 +127,10 @@ ar2315_irq_dispatch(void)
do_IRQ(AR2315_IRQ_WLAN0_INTRS);
else if (pending & CAUSEF_IP4)
do_IRQ(AR2315_IRQ_ENET0_INTRS);
@ -293,6 +294,6 @@
+ else if (pending & CAUSEF_IP5)
+ ar2315_pci_irq(AR2315_IRQ_LCBUS_PCI);
+#endif
else if (pending & CAUSEF_IP2) {
unsigned int misc_intr = ar231x_read_reg(AR2315_ISR) &
ar231x_read_reg(AR2315_IMR);
else if (pending & CAUSEF_IP2)
ar2315_misc_irq_dispatch();
else if (pending & CAUSEF_IP7)

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