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@ -38,7 +38,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org> |
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+};
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--- a/drivers/phy/Kconfig
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+++ b/drivers/phy/Kconfig
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@@ -331,6 +331,14 @@ config PHY_XGENE
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@@ -331,6 +331,14 @@
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help
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This option enables support for APM X-Gene SoC multi-purpose PHY.
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@ -55,14 +55,14 @@ Signed-off-by: John Crispin <blogic@openwrt.org> |
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depends on RESET_CONTROLLER
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--- a/drivers/phy/Makefile
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+++ b/drivers/phy/Makefile
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@@ -46,3 +46,4 @@ obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-
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@@ -46,3 +46,4 @@
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obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
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obj-$(CONFIG_PHY_BRCMSTB_SATA) += phy-brcmstb-sata.o
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obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
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+obj-$(CONFIG_PHY_RALINK_USB) += phy-ralink-usb.o
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--- /dev/null
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+++ b/drivers/phy/phy-ralink-usb.c
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@@ -0,0 +1,175 @@
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@@ -0,0 +1,228 @@
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+/*
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+ * Allwinner ralink USB phy driver
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+ *
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@ -99,6 +99,20 @@ Signed-off-by: John Crispin <blogic@openwrt.org> |
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+#define RT_SYSC_REG_CLKCFG1 0x030
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+#define RT_SYSC_REG_USB_PHY_CFG 0x05c
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+
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+#define OFS_U2_PHY_AC0 0x00
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+#define OFS_U2_PHY_AC1 0x04
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+#define OFS_U2_PHY_AC2 0x08
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+#define OFS_U2_PHY_ACR0 0x10
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+#define OFS_U2_PHY_ACR1 0x14
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+#define OFS_U2_PHY_ACR2 0x18
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+#define OFS_U2_PHY_ACR3 0x1C
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+#define OFS_U2_PHY_ACR4 0x20
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+#define OFS_U2_PHY_AMON0 0x24
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+#define OFS_U2_PHY_DCR0 0x60
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+#define OFS_U2_PHY_DCR1 0x64
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+#define OFS_U2_PHY_DTM0 0x68
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+#define OFS_U2_PHY_DTM1 0x6C
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+
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+#define RT_RSTCTRL_UDEV BIT(25)
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+#define RT_RSTCTRL_UHST BIT(22)
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+#define RT_SYSCFG1_USB0_HOST_MODE BIT(10)
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@ -116,8 +130,40 @@ Signed-off-by: John Crispin <blogic@openwrt.org> |
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+ struct reset_control *rsthost;
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+ u32 clk;
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+ struct phy *phy;
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+ void __iomem *base;
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+};
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+
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+static void u2_phy_w32(struct ralink_usb_phy *phy, u32 val, u32 reg)
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+{
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+ iowrite32(val, phy->base + reg);
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+}
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+
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+static u32 u2_phy_r32(struct ralink_usb_phy *phy, u32 reg)
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+{
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+ return ioread32(phy->base + reg);
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+}
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+
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+static void
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+u2_phy_init(struct ralink_usb_phy *phy)
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+{
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+ u2_phy_r32(phy, OFS_U2_PHY_AC2);
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+ u2_phy_r32(phy, OFS_U2_PHY_ACR0);
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+ u2_phy_r32(phy, OFS_U2_PHY_DCR0);
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+
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+ u2_phy_w32(phy, 0x00ffff02, OFS_U2_PHY_DCR0);
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+ u2_phy_r32(phy, OFS_U2_PHY_DCR0);
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+ u2_phy_w32(phy, 0x00555502, OFS_U2_PHY_DCR0);
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+ u2_phy_r32(phy, OFS_U2_PHY_DCR0);
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+ u2_phy_w32(phy, 0x00aaaa02, OFS_U2_PHY_DCR0);
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+ u2_phy_r32(phy, OFS_U2_PHY_DCR0);
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+ u2_phy_w32(phy, 0x00000402, OFS_U2_PHY_DCR0);
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+ u2_phy_r32(phy, OFS_U2_PHY_DCR0);
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+ u2_phy_w32(phy, 0x0048086a, OFS_U2_PHY_AC0);
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+ u2_phy_w32(phy, 0x4400001c, OFS_U2_PHY_AC1);
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+ u2_phy_w32(phy, 0xc0200000, OFS_U2_PHY_ACR3);
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+ u2_phy_w32(phy, 0x02000000, OFS_U2_PHY_DTM0);
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+}
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+
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+static int ralink_usb_phy_power_on(struct phy *_phy)
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+{
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+ struct ralink_usb_phy *phy = phy_get_drvdata(_phy);
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@ -139,6 +185,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org> |
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+ */
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+ mdelay(10);
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+
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+ if (!IS_ERR(phy->base))
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+ u2_phy_init(phy);
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+
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+ /* print some status info */
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+ t = rt_sysc_r32(RT_SYSC_REG_USB_PHY_CFG);
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+ dev_info(&phy->phy->dev, "remote usb device wakeup %s\n",
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@ -155,13 +204,13 @@ Signed-off-by: John Crispin <blogic@openwrt.org> |
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+{
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+ struct ralink_usb_phy *phy = phy_get_drvdata(_phy);
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+
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+ /* disable the phy */
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+ rt_sysc_m32(phy->clk, 0, RT_SYSC_REG_CLKCFG1);
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+
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+ /* assert the reset lines */
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+ reset_control_assert(phy->rstdev);
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+ reset_control_assert(phy->rsthost);
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+
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+ /* disable the phy */
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+ rt_sysc_m32(phy->clk, 0, RT_SYSC_REG_CLKCFG1);
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+
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+ return 0;
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+}
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+
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@ -187,6 +236,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org> |
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+
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+static int ralink_usb_phy_probe(struct platform_device *pdev)
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+{
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+ struct resource *res;
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+ struct device *dev = &pdev->dev;
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+ struct phy_provider *phy_provider;
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+ const struct of_device_id *match;
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@ -202,6 +252,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org> |
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+
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+ phy->clk = (int) match->data;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ phy->base = devm_ioremap_resource(&pdev->dev, res);
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+
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+ phy->rsthost = devm_reset_control_get(&pdev->dev, "host");
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+ if (IS_ERR(phy->rsthost)) {
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+ dev_err(dev, "host reset is missing\n");
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