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@ -524,7 +524,7 @@ |
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+#endif /* __ASM_MACH_AR231X_CPU_FEATURE_OVERRIDES_H */
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-ar231x/dma-coherence.h
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@@ -0,0 +1,77 @@
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@@ -0,0 +1,76 @@
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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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@ -537,9 +537,8 @@ |
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+#ifndef __ASM_MACH_AR231X_DMA_COHERENCE_H
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+#define __ASM_MACH_AR231X_DMA_COHERENCE_H
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+
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+#define PCI_DMA_OFFSET 0x20000000
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+
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+#include <linux/device.h>
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+#include <ar2315_regs.h>
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+
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+static inline dma_addr_t ar231x_dev_offset(struct device *dev)
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+{
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@ -547,7 +546,7 @@ |
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+ extern struct bus_type pci_bus_type;
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+
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+ if (dev && dev->bus == &pci_bus_type)
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+ return PCI_DMA_OFFSET;
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+ return AR2315_PCI_HOST_SDRAM_BASEADDR;
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+#endif
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+ return 0;
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+}
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@ -674,7 +673,7 @@ |
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+#endif /* __ASM_MACH_AR231X_WAR_H */
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
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@@ -0,0 +1,625 @@
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@@ -0,0 +1,631 @@
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+/*
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+ * Register definitions for AR2315+
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+ *
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@ -1291,13 +1290,19 @@ |
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+#define AR2315_IRCFG_SEQ_END_WIN_THRESH 0x001f0000
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+#define AR2315_IRCFG_NUM_BACKOFF_WORDS 0x01e00000
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+
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+#define HOST_PCI_DEV_ID 3
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+#define HOST_PCI_MBAR0 0x10000000
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+#define HOST_PCI_MBAR1 0x20000000
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+#define HOST_PCI_MBAR2 0x30000000
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+
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+#define HOST_PCI_SDRAM_BASEADDR HOST_PCI_MBAR1
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+#define PCI_DEVICE_MEM_SPACE 0x800000
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+/*
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+ * We need some arbitrary non-zero value to be programmed to the BAR1 register
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+ * of PCI host controller to enable DMA. The same value should be used as the
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+ * offset to calculate the physical address of DMA buffer for PCI devices.
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+ */
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+#define AR2315_PCI_HOST_SDRAM_BASEADDR 0x20000000
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+
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+/* ??? access BAR */
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+#define AR2315_PCI_HOST_MBAR0 0x10000000
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+/* RAM access BAR */
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+#define AR2315_PCI_HOST_MBAR1 AR2315_PCI_HOST_SDRAM_BASEADDR
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+/* ??? access BAR */
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+#define AR2315_PCI_HOST_MBAR2 0x30000000
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+
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+#endif /* __ASM_MACH_AR231X_AR2315_REGS_H */
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--- /dev/null
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