The GW5520 is a small form-factor single-board computer with the following features: * 70x100mm form-factor * IMX6DL 800MHz SoC (IMX6Q optional) * 512MB 32bit DDR3 SDRAM (up to 2GB optional) * 256MB NAND FLASH (up to 2GB optional) * Gateworks System Controller * 2x front-panel Intel i210 GbE adapters with passive PoE support * 2x MiniPCIe sockets with USB support * 2x front-panel USB * 1x rear-panel full-size HDMI connector * 1x front-panel bi-color user LED * 1x front-panel user pushbutton * 1x rear-panel barrel jack for power * 1x Application connector with: * 2x TTL level UARTs * 10x TTL level Digital IO Signed-off-by: Tim Harvey <tharvey@gateworks.com> SVN-Revision: 42148master
Luka Perkov
11 years ago
parent
dcacd65281
commit
fa8e8d262e
@ -0,0 +1,19 @@ |
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/* |
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* Copyright 2014 Gateworks Corporation |
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* |
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* The code contained herein is licensed under the GNU General Public |
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* License. You may obtain a copy of the GNU General Public License |
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* Version 2 or later at the following locations: |
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* |
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* http://www.opensource.org/licenses/gpl-license.html |
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* http://www.gnu.org/copyleft/gpl.html |
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*/ |
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|
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/dts-v1/; |
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#include "imx6dl.dtsi" |
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#include "imx6qdl-gw552x.dtsi" |
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/ { |
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model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X"; |
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compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl"; |
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}; |
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@ -0,0 +1,23 @@ |
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/* |
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* Copyright 2014 Gateworks Corporation |
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* |
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* The code contained herein is licensed under the GNU General Public |
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* License. You may obtain a copy of the GNU General Public License |
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* Version 2 or later at the following locations: |
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* |
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* http://www.opensource.org/licenses/gpl-license.html |
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* http://www.gnu.org/copyleft/gpl.html |
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*/ |
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/dts-v1/; |
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#include "imx6q.dtsi" |
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#include "imx6qdl-gw552x.dtsi" |
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/ { |
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model = "Gateworks Ventana i.MX6 Dual/Quad GW552X"; |
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compatible = "gw,imx6q-gw552x", "gw,ventana", "fsl,imx6q"; |
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}; |
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&sata { |
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status = "okay"; |
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}; |
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@ -0,0 +1,313 @@ |
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/* |
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* Copyright 2014 Gateworks Corporation |
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* |
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* The code contained herein is licensed under the GNU General Public |
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* License. You may obtain a copy of the GNU General Public License |
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* Version 2 or later at the following locations: |
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* |
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* http://www.opensource.org/licenses/gpl-license.html |
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* http://www.gnu.org/copyleft/gpl.html |
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*/ |
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/ { |
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/* these are used by bootloader for disabling nodes */ |
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aliases { |
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led0 = &led0; |
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led1 = &led1; |
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led2 = &led2; |
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nand = &gpmi; |
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usb0 = &usbh1; |
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}; |
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chosen { |
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bootargs = "console=ttymxc1,115200"; |
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}; |
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leds { |
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compatible = "gpio-leds"; |
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led0: user1 { |
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label = "user1"; |
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gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */ |
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default-state = "on"; |
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linux,default-trigger = "heartbeat"; |
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}; |
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led1: user2 { |
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label = "user2"; |
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gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */ |
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default-state = "off"; |
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}; |
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led2: user3 { |
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label = "user3"; |
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gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */ |
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default-state = "off"; |
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}; |
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}; |
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memory { |
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reg = <0x10000000 0x20000000>; |
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}; |
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regulators { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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reg_1p0v: regulator@0 { |
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compatible = "regulator-fixed"; |
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reg = <0>; |
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regulator-name = "1P0V"; |
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regulator-min-microvolt = <1000000>; |
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regulator-max-microvolt = <1000000>; |
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regulator-always-on; |
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}; |
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reg_3p3v: regulator@2 { |
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compatible = "regulator-fixed"; |
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reg = <2>; |
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regulator-name = "3P3V"; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-always-on; |
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}; |
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reg_5p0v: regulator@3 { |
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compatible = "regulator-fixed"; |
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reg = <3>; |
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regulator-name = "5P0V"; |
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regulator-min-microvolt = <5000000>; |
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regulator-max-microvolt = <5000000>; |
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regulator-always-on; |
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}; |
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}; |
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}; |
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&gpmi { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_gpmi_nand>; |
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status = "okay"; |
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}; |
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&i2c1 { |
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clock-frequency = <100000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c1>; |
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status = "okay"; |
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eeprom1: eeprom@50 { |
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compatible = "atmel,24c02"; |
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reg = <0x50>; |
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pagesize = <16>; |
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}; |
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eeprom2: eeprom@51 { |
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compatible = "atmel,24c02"; |
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reg = <0x51>; |
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pagesize = <16>; |
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}; |
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eeprom3: eeprom@52 { |
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compatible = "atmel,24c02"; |
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reg = <0x52>; |
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pagesize = <16>; |
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}; |
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eeprom4: eeprom@53 { |
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compatible = "atmel,24c02"; |
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reg = <0x53>; |
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pagesize = <16>; |
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}; |
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gpio: pca9555@23 { |
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compatible = "nxp,pca9555"; |
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reg = <0x23>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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}; |
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hwmon: gsc@29 { |
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compatible = "gw,gsp"; |
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reg = <0x29>; |
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}; |
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rtc: ds1672@68 { |
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compatible = "dallas,ds1672"; |
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reg = <0x68>; |
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}; |
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}; |
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&i2c2 { |
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clock-frequency = <100000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c2>; |
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status = "okay"; |
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pciswitch: pex8609@3f { |
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compatible = "plx,pex8609"; |
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reg = <0x3f>; |
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}; |
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pmic: ltc3676@3c { |
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compatible = "ltc,ltc3676"; |
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reg = <0x3c>; |
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regulators { |
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sw1_reg: ltc3676__sw1 { |
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regulator-min-microvolt = <1175000>; |
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regulator-max-microvolt = <1175000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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sw2_reg: ltc3676__sw2 { |
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regulator-min-microvolt = <1800000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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sw3_reg: ltc3676__sw3 { |
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regulator-min-microvolt = <1175000>; |
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regulator-max-microvolt = <1175000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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sw4_reg: ltc3676__sw4 { |
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regulator-min-microvolt = <1500000>; |
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regulator-max-microvolt = <1500000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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ldo2_reg: ltc3676__ldo2 { |
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regulator-min-microvolt = <2500000>; |
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regulator-max-microvolt = <2500000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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ldo4_reg: ltc3676__ldo4 { |
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regulator-min-microvolt = <3000000>; |
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regulator-max-microvolt = <3000000>; |
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}; |
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}; |
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}; |
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}; |
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&i2c3 { |
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clock-frequency = <100000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c3>; |
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status = "okay"; |
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}; |
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&iomuxc { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_hog>; |
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imx6qdl-gw52xx { |
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pinctrl_hog: hoggrp { |
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fsl,pins = < |
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MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */ |
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MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* USBHUB_RST# */ |
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MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIESKT_WDIS# */ |
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MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ |
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MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ |
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MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ |
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>; |
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}; |
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pinctrl_gpmi_nand: gpminandgrp { |
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fsl,pins = < |
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MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 |
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MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 |
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MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 |
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MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 |
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MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 |
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MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 |
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MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 |
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MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 |
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MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 |
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MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 |
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MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 |
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MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 |
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MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 |
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MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 |
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MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 |
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MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 |
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>; |
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}; |
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pinctrl_i2c1: i2c1grp { |
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fsl,pins = < |
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MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 |
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MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 |
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>; |
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}; |
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pinctrl_i2c2: i2c2grp { |
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fsl,pins = < |
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MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 |
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 |
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>; |
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}; |
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pinctrl_i2c3: i2c3grp { |
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fsl,pins = < |
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MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 |
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MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 |
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>; |
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}; |
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pinctrl_uart2: uart2grp { |
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fsl,pins = < |
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MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 |
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MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 |
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>; |
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}; |
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pinctrl_uart3: uart3grp { |
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fsl,pins = < |
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MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 |
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MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 |
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>; |
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}; |
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pinctrl_uart5: uart5grp { |
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fsl,pins = < |
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MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 |
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MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 |
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>; |
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}; |
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}; |
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}; |
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&pcie { |
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reset-gpio = <&gpio1 29 0>; |
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status = "okay"; |
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}; |
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&uart2 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart2>; |
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status = "okay"; |
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}; |
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&uart3 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart3>; |
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status = "okay"; |
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}; |
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&uart5 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart5>; |
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status = "okay"; |
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}; |
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&usbh1 { |
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status = "okay"; |
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}; |
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@ -0,0 +1,58 @@ |
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This patch allows passing in the gpio output mask used for GPIO0-7 on the
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PLX PCIe bridge. These GPIO's are used for PERST# on the downstream ports.
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Allowing the kernel to override the default configuration allows for keeping
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specific devices held in reset. One important use of this is to allow
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temporarily disabling devices that may request too many resources such as
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an unprogrammed i210 device.
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--- a/arch/arm/mach-imx/mach-imx6q.c
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+++ b/arch/arm/mach-imx/mach-imx6q.c
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@@ -84,6 +84,7 @@ static int ksz9031rn_phy_fixup(struct ph
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* fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
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* as they are used for slots1-7 PERST#
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*/
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+unsigned int ventana_plx_gpio = 0xfe;
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static void ventana_pciesw_early_fixup(struct pci_dev *dev)
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{
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u32 dw;
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@@ -95,19 +96,25 @@ static void ventana_pciesw_early_fixup(s
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return;
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pci_read_config_dword(dev, 0x62c, &dw);
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+ dev_info(&dev->dev, "de-asserting downstream PERST# 0x%04x\n",
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+ ventana_plx_gpio);
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dw |= 0xaaa8; // GPIO1-7 outputs
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pci_write_config_dword(dev, 0x62c, dw);
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-
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- pci_read_config_dword(dev, 0x644, &dw);
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- dw |= 0xfe; // GPIO1-7 output high
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- pci_write_config_dword(dev, 0x644, dw);
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-
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+ pci_write_config_dword(dev, 0x644, ventana_plx_gpio);
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msleep(100);
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}
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, ventana_pciesw_early_fixup);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, ventana_pciesw_early_fixup);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, ventana_pciesw_early_fixup);
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+static int __init setup_ventana_plx_gpio(char *str)
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+{
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+ get_option(&str, &ventana_plx_gpio);
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+
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+ return 0;
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+}
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+early_param("plx_gpio", setup_ventana_plx_gpio);
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+
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static int ar8031_phy_fixup(struct phy_device *dev)
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{
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u16 val;
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@@ -308,7 +315,7 @@ static void __init imx6q_init_irq(void)
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irqchip_init();
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}
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-static const char *imx6q_dt_compat[] __initconst = {
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+static const char *imx6q_dt_compat[] __initdata = {
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"fsl,imx6dl",
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"fsl,imx6q",
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NULL,
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@ -0,0 +1,18 @@ |
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -158,6 +158,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
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imx6dl-gw52xx.dtb \
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imx6dl-gw53xx.dtb \
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imx6dl-gw54xx.dtb \
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+ imx6dl-gw552x.dtb \
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imx6dl-hummingboard.dtb \
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imx6dl-sabreauto.dtb \
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imx6dl-sabresd.dtb \
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@@ -169,6 +170,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
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imx6q-gw53xx.dtb \
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imx6q-gw5400-a.dtb \
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imx6q-gw54xx.dtb \
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+ imx6q-gw552x.dtb \
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imx6q-phytec-pbab01.dtb \
|
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imx6q-sabreauto.dtb \
|
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imx6q-sabrelite.dtb \
|
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Loading…
Reference in new issue