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@ -219,17 +219,17 @@ static inline void ar7240sw_init(struct ar7240sw *as, struct mii_bus *mii) |
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static inline u16 mk_phy_addr(u32 reg) |
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{ |
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return (0x17 & ((reg >> 4) | 0x10)); |
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return 0x17 & ((reg >> 4) | 0x10); |
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} |
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static inline u16 mk_phy_reg(u32 reg) |
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{ |
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return ((reg << 1) & 0x1e); |
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return (reg << 1) & 0x1e; |
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} |
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static inline u16 mk_high_addr(u32 reg) |
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{ |
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return ((reg >> 7) & 0x1ff); |
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return (reg >> 7) & 0x1ff; |
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} |
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static u32 __ar7240sw_reg_read(struct ar7240sw *as, u32 reg) |
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@ -249,7 +249,7 @@ static u32 __ar7240sw_reg_read(struct ar7240sw *as, u32 reg) |
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lo = (u32) mdiobus_read(mii, phy_addr, phy_reg); |
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hi = (u32) mdiobus_read(mii, phy_addr, phy_reg + 1); |
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return ((hi << 16) | lo); |
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return (hi << 16) | lo; |
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} |
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static void __ar7240sw_reg_write(struct ar7240sw *as, u32 reg, u32 val) |
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@ -352,7 +352,7 @@ static u16 ar7240sw_phy_read(struct ar7240sw *as, unsigned phy_addr, |
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return 0xffff; |
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t = ar7240sw_reg_read(as, AR7240_REG_MDIO_CTRL); |
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return (t & AR7240_MDIO_CTRL_DATA_M); |
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return t & AR7240_MDIO_CTRL_DATA_M; |
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} |
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static int ar7240sw_phy_write(struct ar7240sw *as, unsigned phy_addr, |
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