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@ -1,8 +1,8 @@ |
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--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -417,7 +417,6 @@ config ARCH_IXP4XX
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@@ -435,7 +435,6 @@ config ARCH_IXP4XX
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select CPU_XSCALE
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select GENERIC_GPIO
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select GENERIC_TIME
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select GENERIC_CLOCKEVENTS
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- select DMABOUNCE if PCI
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help
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@ -10,26 +10,24 @@ |
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--- a/arch/arm/mach-ixp4xx/Kconfig
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+++ b/arch/arm/mach-ixp4xx/Kconfig
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@@ -199,6 +199,45 @@ config IXP4XX_INDIRECT_PCI
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@@ -199,6 +199,43 @@ config IXP4XX_INDIRECT_PCI
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need to use the indirect method instead. If you don't know
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what you need, leave this option unselected.
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+config IXP4XX_LEGACY_DMABOUNCE
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+ bool "legacy PCI DMA bounce support"
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+ bool "Legacy PCI DMA bounce support"
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+ depends on PCI
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+ default n
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+ select DMABOUNCE
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+ help
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+ The IXP4xx is limited to a 64MB window for PCI DMA, which
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+ requires that PCI accesses above 64MB are bounced via buffers
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+ below 64MB. Furthermore the IXP4xx has an erratum where PCI
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+ read prefetches just below the 64MB limit can trigger lockups.
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+ requires that PCI accesses >= 64MB are bounced via buffers
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+ below 64MB.
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+
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+ The kernel has traditionally handled these two issue by using
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+ ARM specific DMA bounce support code for all accesses >= 64MB.
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+ The kernel has traditionally handled this issue by using ARM
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+ specific DMA bounce support code for all accesses >= 64MB.
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+ That code causes problems of its own, so it is desirable to
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+ disable it. As the kernel now has a workaround for the PCI read
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+ prefetch erratum, it no longer requires the ARM bounce code.
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+ disable it.
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+
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+ Enabling this option makes IXP4xx continue to use the problematic
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+ ARM DMA bounce code. Disabling this option makes IXP4xx use the
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@ -58,7 +56,7 @@ |
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help
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--- a/arch/arm/mach-ixp4xx/common-pci.c
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+++ b/arch/arm/mach-ixp4xx/common-pci.c
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@@ -321,27 +321,38 @@ static int abort_handler(unsigned long a
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@@ -321,27 +321,33 @@ static int abort_handler(unsigned long a
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*/
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static int ixp4xx_pci_platform_notify(struct device *dev)
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{
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@ -88,12 +86,8 @@ |
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+#ifdef CONFIG_DMABOUNCE
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int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
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{
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+ /* Note that this returns true for the last page below 64M due to
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+ * IXP4xx erratum 15 (SCR 1289), which states that PCI prefetches
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+ * can cross the boundary between valid memory and a reserved region
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+ * causing AHB bus errors and a lock-up.
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+ */
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return (dev->bus == &pci_bus_type ) && ((dma_addr + size) >= SZ_64M);
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- return (dev->bus == &pci_bus_type ) && ((dma_addr + size) >= SZ_64M);
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+ return (dev->bus == &pci_bus_type ) && ((dma_addr + size) > SZ_64M);
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}
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+#endif
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@ -101,7 +95,7 @@ |
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/*
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* Only first 64MB of memory can be accessed via PCI.
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* We use GFP_DMA to allocate safe buffers to do map/unmap.
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@@ -364,6 +375,7 @@ void __init ixp4xx_adjust_zones(int node
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@@ -364,6 +370,7 @@ void __init ixp4xx_adjust_zones(int node
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zhole_size[1] = zhole_size[0];
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zhole_size[0] = 0;
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}
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