Wallys DR531 is based on Qualcomm Atheros QCA9531 v2. Short specification: - 550/400/200 MHz (CPU/DDR/AHB) - 2x 10/100 Mbps Ethernet - 64 MB of RAM (DDR2) - 8 MB of FLASH - 2T2R 2.4 GHz with external PA (SE2576L), up to 30 dBm - 2x MMCX connectors - mini-PCIe connector with PCIe/USB buses and SIM slot - 7x LED, 1x button, 1x optional buzzer - UART, (E)JTAG and LED headers Default configuration: - WAN on eth1 (RJ45 near DC jack) - LAN on eth0 (RJ45 near button) - S4 LED set to be status LED - all LEDs configurable form user space - button configured for reset Flash instruction (do it under U-Boot, using UART): 1. tftp 0x80060000 lede-ar71xx-generic-dr531-squashfs-sysupgrade.bin 2. erase 0x9f050000 +$filesize 3. cp.b $fileaddr 0x9f050000 $filesize 4. setenv bootcmd "bootm 0x9f050000" 5. saveenv && reset Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>master
Piotr Dymacz
8 years ago
committed by
Jo-Philipp Wich
parent
3c6b091b65
commit
e767980eb8
@ -0,0 +1,155 @@ |
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/*
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* Wallys DR531 board support |
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* |
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* Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com> |
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* |
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* Based on mach-wpj531.c |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 as published |
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* by the Free Software Foundation. |
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*/ |
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#include <linux/pci.h> |
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#include <linux/gpio.h> |
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#include <linux/platform_device.h> |
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#include <asm/mach-ath79/ath79.h> |
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#include <asm/mach-ath79/ar71xx_regs.h> |
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#include "common.h" |
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#include "dev-ap9x-pci.h" |
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#include "dev-eth.h" |
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#include "dev-gpio-buttons.h" |
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#include "dev-leds-gpio.h" |
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#include "dev-m25p80.h" |
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#include "dev-usb.h" |
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#include "dev-wmac.h" |
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#include "machtypes.h" |
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#include "pci.h" |
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#define DR531_GPIO_BUZZER 4 |
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#define DR531_GPIO_LED_WAN 11 |
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#define DR531_GPIO_LED_LAN 14 |
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#define DR531_GPIO_LED_SIG1 12 |
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#define DR531_GPIO_LED_SIG2 16 |
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#define DR531_GPIO_LED_SIG3 15 |
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#define DR531_GPIO_LED_SIG4 13 |
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#define DR531_GPIO_BTN_RESET 17 |
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#define DR531_KEYS_POLL_INTERVAL 20 /* msecs */ |
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#define DR531_KEYS_DEBOUNCE_INTERVAL (3 * DR531_KEYS_POLL_INTERVAL) |
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#define DR531_MAC0_OFFSET 0x0 |
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#define DR531_MAC1_OFFSET 0x8 |
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#define DR531_WMAC_CALDATA_OFFSET 0x1000 |
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static struct gpio_led dr531_leds_gpio[] __initdata = { |
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{ |
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.name = "dr531:green:wan", |
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.gpio = DR531_GPIO_LED_WAN, |
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.active_low = 1, |
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}, |
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{ |
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.name = "dr531:green:lan", |
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.gpio = DR531_GPIO_LED_LAN, |
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.active_low = 1, |
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}, |
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{ |
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.name = "dr531:green:sig1", |
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.gpio = DR531_GPIO_LED_SIG1, |
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.active_low = 1, |
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}, |
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{ |
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.name = "dr531:green:sig2", |
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.gpio = DR531_GPIO_LED_SIG2, |
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.active_low = 1, |
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}, |
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{ |
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.name = "dr531:green:sig3", |
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.gpio = DR531_GPIO_LED_SIG3, |
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.active_low = 1, |
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}, |
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{ |
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.name = "dr531:green:sig4", |
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.gpio = DR531_GPIO_LED_SIG4, |
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.active_low = 1, |
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}, |
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{ |
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.name = "dr531:buzzer", |
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.gpio = DR531_GPIO_BUZZER, |
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.active_low = 0, |
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} |
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}; |
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static struct gpio_keys_button dr531_gpio_keys[] __initdata = { |
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{ |
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.desc = "reset", |
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.type = EV_KEY, |
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.code = KEY_RESTART, |
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.debounce_interval = DR531_KEYS_DEBOUNCE_INTERVAL, |
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.gpio = DR531_GPIO_BTN_RESET, |
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.active_low = 1, |
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}, |
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}; |
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static void __init dr531_gpio_setup(void) |
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{ |
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ath79_gpio_direction_select(DR531_GPIO_BUZZER, true); |
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ath79_gpio_direction_select(DR531_GPIO_LED_WAN, true); |
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ath79_gpio_direction_select(DR531_GPIO_LED_LAN, true); |
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ath79_gpio_direction_select(DR531_GPIO_LED_SIG1, true); |
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ath79_gpio_direction_select(DR531_GPIO_LED_SIG2, true); |
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ath79_gpio_direction_select(DR531_GPIO_LED_SIG3, true); |
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ath79_gpio_direction_select(DR531_GPIO_LED_SIG4, true); |
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ath79_gpio_output_select(DR531_GPIO_BUZZER, 0); |
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ath79_gpio_output_select(DR531_GPIO_LED_WAN, 0); |
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ath79_gpio_output_select(DR531_GPIO_LED_LAN, 0); |
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ath79_register_leds_gpio(-1, ARRAY_SIZE(dr531_leds_gpio), |
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dr531_leds_gpio); |
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ath79_register_gpio_keys_polled(-1, DR531_KEYS_POLL_INTERVAL, |
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ARRAY_SIZE(dr531_gpio_keys), |
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dr531_gpio_keys); |
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} |
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static void __init dr531_setup(void) |
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{ |
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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u8 *mac = (u8 *) KSEG1ADDR(0x1f03f810); |
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ath79_register_m25p80(NULL); |
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dr531_gpio_setup(); |
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ath79_setup_ar933x_phy4_switch(false, false); |
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ath79_register_mdio(0, 0x0); |
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/* LAN */ |
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ath79_eth0_data.duplex = DUPLEX_FULL; |
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
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ath79_eth0_data.speed = SPEED_100; |
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ath79_eth0_data.phy_mask = BIT(4); |
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ath79_init_mac(ath79_eth0_data.mac_addr, mac + DR531_MAC1_OFFSET, 0); |
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ath79_register_eth(0); |
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/* WAN */ |
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ath79_switch_data.phy4_mii_en = 1; |
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ath79_eth1_data.duplex = DUPLEX_FULL; |
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; |
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ath79_eth1_data.speed = SPEED_1000; |
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ath79_switch_data.phy_poll_mask |= BIT(4); |
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ath79_init_mac(ath79_eth1_data.mac_addr, mac + DR531_MAC0_OFFSET, 0); |
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ath79_register_eth(1); |
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ath79_register_wmac(art + DR531_WMAC_CALDATA_OFFSET, NULL); |
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ath79_register_pci(); |
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ath79_register_usb(); |
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} |
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MIPS_MACHINE(ATH79_MACH_DR531, "DR531", "Wallys DR531", dr531_setup); |
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