atheros[uart]: use 32-bit aligned I/O

Use 32-bit aligned I/O and update base UART address (remove +3 offset).

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 41699
master
Felix Fietkau 10 years ago
parent 572b532e6a
commit e744878636
  1. 6
      target/linux/atheros/patches-3.10/100-board.patch
  2. 4
      target/linux/atheros/patches-3.10/101-early-printk-support.patch

@ -766,7 +766,7 @@
+#define AR2315_LOCAL 0x10400000 /* LOCAL BUS MMR */
+#define AR2315_ENET0 0x10500000 /* ETHERNET MMR */
+#define AR2315_DSLBASE 0x11000000 /* RESET CONTROL MMR */
+#define AR2315_UART0 0x11100003 /* UART MMR */
+#define AR2315_UART0 0x11100000 /* UART MMR */
+#define AR2315_SPI_MMR 0x11300000 /* SPI FLASH MMR */
+#define AR2315_PCIEXT 0x80000000 /* pci external */
+
@ -1385,7 +1385,7 @@
+#define AR531X_FLASHCTL 0x18400000
+#define AR531X_APBBASE 0x1c000000
+#define AR531X_FLASH 0x1e000000
+#define AR531X_UART0 0xbc000003 /* UART MMR */
+#define AR531X_UART0 0xbc000000 /* UART MMR */
+
+/*
+ * AR531X_NUM_ENET_MAC defines the number of ethernet MACs that
@ -3007,7 +3007,7 @@
+ memset(&s, 0, sizeof(s));
+
+ s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
+ s.iotype = UPIO_MEM;
+ s.iotype = UPIO_MEM32;
+ s.irq = irq;
+ s.regshift = 2;
+ s.mapbase = mapbase;

@ -21,12 +21,12 @@
+static inline void prom_uart_wr(void __iomem *base, unsigned reg,
+ unsigned char ch)
+{
+ __raw_writeb(ch, base + 4 * reg);
+ __raw_writel(ch, base + 4 * reg);
+}
+
+static inline unsigned char prom_uart_rr(void __iomem *base, unsigned reg)
+{
+ return __raw_readb(base + 4 * reg);
+ return __raw_readl(base + 4 * reg);
+}
+
+void prom_putchar(unsigned char ch)

Loading…
Cancel
Save