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ASoC: Fix and cleaup dma config

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SVN-Revision: 21618
master
Lars-Peter Clausen 15 years ago
parent dd93818f19
commit e66107e12b
1 changed files with 91 additions and 95 deletions
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  1. 186
      target/linux/xburst/patches-2.6.34/061-asoc.patch

186
target/linux/xburst/patches-2.6.34/061-asoc.patch
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@ -1,6 +1,6 @@
From 6548719b6a1ce4e202d58625fbfb94e6c894ced9 Mon Sep 17 00:00:00 2001
From d12d1c5f8615192b545faa69a553f64d4d9cc9ab Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sat, 24 Apr 2010 12:35:07 +0200
Date: Fri, 28 May 2010 19:54:02 +0200
Subject: [PATCH] Add jz4740 SoC sound drivers
---
@ -8,11 +8,11 @@ Subject: [PATCH] Add jz4740 SoC sound drivers
sound/soc/Makefile | 1 +
sound/soc/jz4740/Kconfig | 13 +
sound/soc/jz4740/Makefile | 9 +
sound/soc/jz4740/jz4740-i2s.c | 572 +++++++++++++++++++++++++++++++++++++++++
sound/soc/jz4740/jz4740-i2s.c | 568 +++++++++++++++++++++++++++++++++++++++++
sound/soc/jz4740/jz4740-i2s.h | 18 ++
sound/soc/jz4740/jz4740-pcm.c | 350 +++++++++++++++++++++++++
sound/soc/jz4740/jz4740-pcm.h | 22 ++
8 files changed, 986 insertions(+), 0 deletions(-)
8 files changed, 982 insertions(+), 0 deletions(-)
create mode 100644 sound/soc/jz4740/Kconfig
create mode 100644 sound/soc/jz4740/Makefile
create mode 100644 sound/soc/jz4740/jz4740-i2s.c
@ -77,10 +77,10 @@ index 0000000..1be8d19
+
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
new file mode 100644
index 0000000..d3daa27
index 0000000..2b139fd
--- /dev/null
+++ b/sound/soc/jz4740/jz4740-i2s.c
@@ -0,0 +1,572 @@
@@ -0,0 +1,568 @@
+/*
+ * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
+ *
@ -173,37 +173,18 @@ index 0000000..d3daa27
+ struct clk *clk_aic;
+ struct clk *clk_i2s;
+
+ struct jz4740_pcm_config capture_pcm_config;
+ struct jz4740_pcm_config playback_pcm_config;
+ struct jz4740_pcm_config pcm_config_playback;
+ struct jz4740_pcm_config pcm_config_capture;
+};
+
+static struct jz4740_dma_config jz4740_i2s_dma_playback_config = {
+ .src_width = JZ4740_DMA_WIDTH_16BIT,
+ .dst_width = JZ4740_DMA_WIDTH_32BIT,
+ .transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE,
+ .request_type = JZ4740_DMA_TYPE_AIC_TRANSMIT,
+ .flags = JZ4740_DMA_SRC_AUTOINC,
+ .mode = JZ4740_DMA_MODE_SINGLE,
+};
+
+static struct jz4740_dma_config jz4740_i2s_dma_capture_config = {
+ .src_width = JZ4740_DMA_WIDTH_32BIT,
+ .dst_width = JZ4740_DMA_WIDTH_16BIT,
+ .transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE,
+ .request_type = JZ4740_DMA_TYPE_AIC_RECEIVE,
+ .flags = JZ4740_DMA_DST_AUTOINC,
+ .mode = JZ4740_DMA_MODE_SINGLE,
+};
+
+
+static inline uint32_t jz4740_i2s_read(const struct jz4740_i2s *i2s,
+ unsigned int reg)
+ unsigned int reg)
+{
+ return readl(i2s->base + reg);
+}
+
+static inline void jz4740_i2s_write(const struct jz4740_i2s *i2s,
+ unsigned int reg, uint32_t value)
+ unsigned int reg, uint32_t value)
+{
+ writel(value, i2s->base + reg);
+}
@ -214,7 +195,7 @@ index 0000000..d3daa27
+}
+
+static int jz4740_i2s_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+ struct snd_soc_dai *dai)
+{
+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
+ uint32_t conf, ctrl;
@ -222,22 +203,22 @@ index 0000000..d3daa27
+ if (dai->active)
+ return 0;
+
+ conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
+ ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
+
+ conf |= JZ_AIC_CONF_ENABLE;
+ ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
+ ctrl |= JZ_AIC_CTRL_FLUSH;
+
+
+ jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
+
+ clk_enable(i2s->clk_i2s);
+
+ conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
+ conf |= JZ_AIC_CONF_ENABLE;
+ jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
+
+ return 0;
+}
+
+static void jz4740_i2s_shutdown(struct snd_pcm_substream *substream, struct
+ snd_soc_dai *dai)
+static void jz4740_i2s_shutdown(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
+ uint32_t conf;
@ -254,7 +235,7 @@ index 0000000..d3daa27
+
+
+static int jz4740_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
+ struct snd_soc_dai *dai)
+ struct snd_soc_dai *dai)
+{
+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
+ bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
@ -262,11 +243,10 @@ index 0000000..d3daa27
+ uint32_t ctrl;
+ uint32_t mask;
+
+ if (playback) {
+ mask = JZ_AIC_CTRL_ENABLE_PLAYBACK | JZ_AIC_CTRL_ENABLE_TX_DMA;
+ } else {
+ mask = JZ_AIC_CTRL_ENABLE_CAPTURE | JZ_AIC_CTRL_ENABLE_RX_DMA;
+ }
+ if (playback)
+ mask = JZ_AIC_CTRL_ENABLE_PLAYBACK | JZ_AIC_CTRL_ENABLE_TX_DMA;
+ else
+ mask = JZ_AIC_CTRL_ENABLE_CAPTURE | JZ_AIC_CTRL_ENABLE_RX_DMA;
+
+ ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
+
@ -274,15 +254,15 @@ index 0000000..d3daa27
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_RESUME:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ ctrl |= mask;
+ break;
+ ctrl |= mask;
+ break;
+ case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ ctrl &= ~mask;
+ break;
+ ctrl &= ~mask;
+ break;
+ default:
+ return -EINVAL;
+ return -EINVAL;
+ }
+
+ jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
@ -291,8 +271,7 @@ index 0000000..d3daa27
+}
+
+
+static int jz4740_i2s_set_fmt(struct snd_soc_dai *dai,
+ unsigned int fmt)
+static int jz4740_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
+{
+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
+
@ -305,36 +284,36 @@ index 0000000..d3daa27
+
+ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBS_CFS:
+ conf |= JZ_AIC_CONF_BIT_CLK_MASTER | JZ_AIC_CONF_SYNC_CLK_MASTER;
+ format |= JZ_AIC_I2S_FMT_ENABLE_SYS_CLK;
+ break;
+ conf |= JZ_AIC_CONF_BIT_CLK_MASTER | JZ_AIC_CONF_SYNC_CLK_MASTER;
+ format |= JZ_AIC_I2S_FMT_ENABLE_SYS_CLK;
+ break;
+ case SND_SOC_DAIFMT_CBM_CFS:
+ conf |= JZ_AIC_CONF_SYNC_CLK_MASTER;
+ break;
+ conf |= JZ_AIC_CONF_SYNC_CLK_MASTER;
+ break;
+ case SND_SOC_DAIFMT_CBS_CFM:
+ conf |= JZ_AIC_CONF_BIT_CLK_MASTER;
+ break;
+ conf |= JZ_AIC_CONF_BIT_CLK_MASTER;
+ break;
+ case SND_SOC_DAIFMT_CBM_CFM:
+ break;
+ break;
+ default:
+ return -EINVAL;
+ return -EINVAL;
+ }
+
+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_MSB:
+ format |= JZ_AIC_I2S_FMT_MSB;
+ break;
+ format |= JZ_AIC_I2S_FMT_MSB;
+ break;
+ case SND_SOC_DAIFMT_I2S:
+ break;
+ break;
+ default:
+ return -EINVAL;
+ return -EINVAL;
+ }
+
+ switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+ case SND_SOC_DAIFMT_NB_NF:
+ break;
+ break;
+ default:
+ return -EINVAL;
+ return -EINVAL;
+ }
+
+ jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
@ -344,8 +323,7 @@ index 0000000..d3daa27
+}
+
+static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+ struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
+{
+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
+ bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
@ -358,11 +336,11 @@ index 0000000..d3daa27
+
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S8:
+ sample_size = 0;
+ sample_size = 0;
+ dma_width = JZ4740_DMA_WIDTH_8BIT;
+ break;
+ break;
+ case SNDRV_PCM_FORMAT_S16:
+ sample_size = 1;
+ sample_size = 1;
+ dma_width = JZ4740_DMA_WIDTH_16BIT;
+ break;
+ default:
@ -379,7 +357,7 @@ index 0000000..d3daa27
+
+ switch (params_channels(params)) {
+ case 2:
+ break;
+ break;
+ case 1:
+ if (playback) {
+ ctrl |= JZ_AIC_CTRL_MONO_TO_STEREO;
@ -392,23 +370,20 @@ index 0000000..d3daa27
+ jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
+
+ if (playback) {
+ jz4740_i2s_dma_playback_config.src_width = dma_width;
+ pcm_config = &i2s->playback_pcm_config;
+ pcm_config->dma_config = &jz4740_i2s_dma_playback_config;
+ pcm_config = &i2s->pcm_config_playback;
+ pcm_config->dma_config.dst_width = dma_width;
+ } else {
+ jz4740_i2s_dma_capture_config.dst_width = dma_width;
+ pcm_config = &i2s->capture_pcm_config;
+ pcm_config->dma_config = &jz4740_i2s_dma_capture_config;
+ pcm_config = &i2s->pcm_config_capture;
+ pcm_config->dma_config.src_width = dma_width;
+ }
+ pcm_config->fifo_addr = i2s->phys_base + JZ_REG_AIC_FIFO;
+
+
+ snd_soc_dai_set_dma_data(dai, substream, pcm_config);
+
+ return 0;
+}
+
+static int jz4740_i2s_set_clkdiv(struct snd_soc_dai *dai,
+ int div_id, int div)
+static int jz4740_i2s_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div)
+{
+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
+
@ -426,7 +401,7 @@ index 0000000..d3daa27
+}
+
+static int jz4740_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id,
+ unsigned int freq, int dir)
+ unsigned int freq, int dir)
+{
+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
+ int ret = 0;
@ -524,13 +499,13 @@ index 0000000..d3daa27
+ .playback = {
+ .channels_min = 1,
+ .channels_max = 2,
+ .rates = SNDRV_PCM_RATE_8000_44100,
+ .rates = SNDRV_PCM_RATE_8000_48000,
+ .formats = JZ4740_I2S_FMTS,
+ },
+ .capture = {
+ .channels_min = 2,
+ .channels_max = 2,
+ .rates = SNDRV_PCM_RATE_8000_44100,
+ .rates = SNDRV_PCM_RATE_8000_48000,
+ .formats = JZ4740_I2S_FMTS,
+ },
+ .symmetric_rates = 1,
@ -540,6 +515,29 @@ index 0000000..d3daa27
+};
+EXPORT_SYMBOL_GPL(jz4740_i2s_dai);
+
+static void __devinit jz4740_i2c_init_pcm_config(struct jz4740_i2s *i2s)
+{
+ struct jz4740_dma_config *dma_config;
+
+ /* Playback */
+ dma_config = &i2s->pcm_config_playback.dma_config;
+ dma_config->src_width = JZ4740_DMA_WIDTH_32BIT,
+ dma_config->transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE;
+ dma_config->request_type = JZ4740_DMA_TYPE_AIC_TRANSMIT;
+ dma_config->flags = JZ4740_DMA_SRC_AUTOINC;
+ dma_config->mode = JZ4740_DMA_MODE_SINGLE;
+ i2s->pcm_config_playback.fifo_addr = i2s->phys_base + JZ_REG_AIC_FIFO;
+
+ /* Capture */
+ dma_config = &i2s->pcm_config_capture.dma_config;
+ dma_config->dst_width = JZ4740_DMA_WIDTH_32BIT,
+ dma_config->transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE;
+ dma_config->request_type = JZ4740_DMA_TYPE_AIC_RECEIVE;
+ dma_config->flags = JZ4740_DMA_DST_AUTOINC;
+ dma_config->mode = JZ4740_DMA_MODE_SINGLE;
+ i2s->pcm_config_capture.fifo_addr = i2s->phys_base + JZ_REG_AIC_FIFO;
+}
+
+static int __devinit jz4740_i2s_dev_probe(struct platform_device *pdev)
+{
+ struct jz4740_i2s *i2s;
@ -574,20 +572,13 @@ index 0000000..d3daa27
+
+ i2s->phys_base = i2s->mem->start;
+
+ jz4740_i2s_dai.private_data = i2s;
+
+ ret = snd_soc_register_dai(&jz4740_i2s_dai);
+
+ i2s->clk_aic = clk_get(&pdev->dev, "aic");
+
+ if (IS_ERR(i2s->clk_aic)) {
+ ret = PTR_ERR(i2s->clk_aic);
+ goto err_iounmap;
+ }
+
+
+ i2s->clk_i2s = clk_get(&pdev->dev, "i2s");
+
+ if (IS_ERR(i2s->clk_i2s)) {
+ ret = PTR_ERR(i2s->clk_i2s);
+ goto err_iounmap;
@ -595,6 +586,11 @@ index 0000000..d3daa27
+
+ clk_enable(i2s->clk_aic);
+
+ jz4740_i2c_init_pcm_config(i2s);
+
+ jz4740_i2s_dai.private_data = i2s;
+ ret = snd_soc_register_dai(&jz4740_i2s_dai);
+
+ platform_set_drvdata(pdev, i2s);
+
+ return 0;
@ -679,7 +675,7 @@ index 0000000..da22ed8
+#endif
diff --git a/sound/soc/jz4740/jz4740-pcm.c b/sound/soc/jz4740/jz4740-pcm.c
new file mode 100644
index 0000000..e55ffbf
index 0000000..fd1c203
--- /dev/null
+++ b/sound/soc/jz4740/jz4740-pcm.c
@@ -0,0 +1,350 @@
@ -735,7 +731,7 @@ index 0000000..e55ffbf
+ .rates = SNDRV_PCM_RATE_8000_48000,
+ .channels_min = 1,
+ .channels_max = 2,
+ .period_bytes_min = 32,
+ .period_bytes_min = 16,
+ .period_bytes_max = 2 * PAGE_SIZE,
+ .periods_min = 2,
+ .periods_max = 128,
@ -805,7 +801,7 @@ index 0000000..e55ffbf
+ if (!prtd->dma)
+ return -EBUSY;
+
+ jz4740_dma_configure(prtd->dma, config->dma_config);
+ jz4740_dma_configure(prtd->dma, &config->dma_config);
+ prtd->fifo_addr = config->fifo_addr;
+
+ jz4740_dma_set_complete_cb(prtd->dma, jz4740_pcm_dma_transfer_done);
@ -1035,7 +1031,7 @@ index 0000000..e55ffbf
+MODULE_LICENSE("GPL");
diff --git a/sound/soc/jz4740/jz4740-pcm.h b/sound/soc/jz4740/jz4740-pcm.h
new file mode 100644
index 0000000..2a11800
index 0000000..e3f221e
--- /dev/null
+++ b/sound/soc/jz4740/jz4740-pcm.h
@@ -0,0 +1,22 @@
@ -1056,7 +1052,7 @@ index 0000000..2a11800
+extern struct snd_soc_platform jz4740_soc_platform;
+
+struct jz4740_pcm_config {
+ struct jz4740_dma_config *dma_config;
+ struct jz4740_dma_config dma_config;
+ phys_addr_t fifo_addr;
+};
+

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