Support Abicom International Scorpion SC450 Board QCA9550 700MHz Extended Temperature Range 256MB DDR2 256MB NAND Flash 16MB NOR Flash 10/100/1000 Ethernet 15W Max, 3x3 Mode, Full Power TX Power 802.3-at POE+ & DC Input options 100x 85mm USB PCIe SFP GPIO/LED Signed-off-by: Conor O'Gorman <i@conorogorman.net>master
Conor O'Gorman
8 years ago
committed by
John Crispin
parent
eb97f41fc2
commit
d38ffd8cd9
@ -0,0 +1,149 @@ |
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/*
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* Abicom International Scorpion SC450 support. |
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* |
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* Copyright (c) 2012 Qualcomm Atheros |
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* Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org> |
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* Copyright (c) 2017 Conor O'Gorman <i@conorogorman.net> |
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* |
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* Permission to use, copy, modify, and/or distribute this software for any |
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* purpose with or without fee is hereby granted, provided that the above |
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* copyright notice and this permission notice appear in all copies. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
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* |
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*/ |
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#include <linux/platform_device.h> |
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#include <linux/platform_data/phy-at803x.h> |
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#include <asm/mach-ath79/ar71xx_regs.h> |
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#include "common.h" |
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#include "pci.h" |
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#include "dev-ap9x-pci.h" |
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#include "dev-gpio-buttons.h" |
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#include "dev-eth.h" |
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#include "dev-leds-gpio.h" |
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#include "dev-m25p80.h" |
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#include "dev-nfc.h" |
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#include "dev-usb.h" |
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#include "dev-wmac.h" |
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#include "machtypes.h" |
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#define SC450_GPIO_LED_POWER 13 |
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#define SC450_GPIO_LED_ERR1 14 |
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#define SC450_GPIO_LED_ERR2 15 |
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#define SC450_GPIO_LED_WLAN 16 |
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#define SC450_GPIO_BTN_RESET 17 |
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#define SC450_GPIO_WP 18 |
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#define SC450_GPIO_POE 19 |
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#define SC450_GPIO_RX_LOS 20 |
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#define SC450_GPIO_MOD_GND 21 |
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#define SC450_GPIO_MOD_SCL 22 |
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#define SC450_GPIO_MOD_SDA 23 |
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#define SC450_KEYS_POLL_INTERVAL 20 /* msecs */ |
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#define SC450_KEYS_DEBOUNCE_INTERVAL (3 * SC450_KEYS_POLL_INTERVAL) |
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#define SC450_MAC0_OFFSET 0 |
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#define SC450_MAC1_OFFSET 6 |
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#define SC450_WMAC_CALDATA_OFFSET 0x1000 |
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#define SC450_PCIE_CALDATA_OFFSET 0x5000 |
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static struct gpio_led sc450_leds_gpio[] __initdata = { |
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{ |
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.name = "sc450:green:power", |
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.gpio = SC450_GPIO_LED_POWER, |
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.active_low = 1, |
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}, |
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{ |
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.name = "sc450:red:power", |
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.gpio = SC450_GPIO_LED_ERR1, |
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.active_low = 1, |
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}, |
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{ |
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.name = "sc450:green:wlan", |
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.gpio = SC450_GPIO_LED_WLAN, |
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.active_low = 1, |
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}, |
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{ |
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.name = "sc450:red:wlan", |
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.gpio = SC450_GPIO_LED_ERR2, |
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.active_low = 1, |
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} |
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}; |
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static struct gpio_keys_button sc450_gpio_keys[] __initdata = { |
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{ |
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.desc = "reset", |
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.type = EV_KEY, |
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.code = KEY_RESTART, |
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.debounce_interval = SC450_KEYS_DEBOUNCE_INTERVAL, |
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.gpio = SC450_GPIO_BTN_RESET, |
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.active_low = 1, |
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} |
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}; |
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static struct at803x_platform_data at803x_data = { |
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.disable_smarteee = 1, |
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.enable_rgmii_rx_delay = 0, |
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.enable_rgmii_tx_delay = 0, |
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}; |
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static struct mdio_board_info sc450_mdio0_info[] = { |
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{ |
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.bus_id = "ag71xx-mdio.0", |
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.phy_addr = 1, |
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.platform_data = &at803x_data, |
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}, |
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}; |
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static void __init sc450_setup(void) |
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{ |
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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ath79_register_m25p80(NULL); |
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ath79_register_leds_gpio(-1, ARRAY_SIZE(sc450_leds_gpio), |
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sc450_leds_gpio); |
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ath79_register_gpio_keys_polled(-1, SC450_KEYS_POLL_INTERVAL, |
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ARRAY_SIZE(sc450_gpio_keys), |
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sc450_gpio_keys); |
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ath79_register_usb(); |
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ath79_register_nfc(); |
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ath79_register_wmac(art + SC450_WMAC_CALDATA_OFFSET, NULL); |
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ath79_register_mdio(0, 0); |
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mdiobus_register_board_info(sc450_mdio0_info, |
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ARRAY_SIZE(sc450_mdio0_info)); |
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ath79_init_mac(ath79_eth0_data.mac_addr, art + SC450_MAC0_OFFSET, 0); |
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ath79_eth0_pll_data.pll_1000 = 0xa6000101; |
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ath79_eth0_pll_data.pll_100 = 0xa4000101; |
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/* GMAC0 is connected to the RMGII interface */ |
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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ath79_eth0_data.phy_mask = 0xF; |
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; |
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ath79_register_eth(0); |
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/* GMAC1 is connected to the SGMII interface */ |
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; |
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ath79_eth1_data.speed = SPEED_1000; |
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ath79_eth1_data.duplex = DUPLEX_FULL; |
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ath79_register_eth(1); |
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ath79_register_pci(); |
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} |
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MIPS_MACHINE(ATH79_MACH_SC450, "SC450", "Abicom SC450", sc450_setup); |
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