From c44506fcbd3657d90f27bc790f4aa22add84db6b Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Sun, 10 Mar 2013 18:25:16 +0000 Subject: [PATCH] cns3xxx: fix an rx irq handling corner case When an rx interrupt comes in, rx interrupts are disabled and NAPI polling is scheduled. During the NAPI poll, the driver first processes received frames in the ring, then fills the dma descriptor slots with new buffers and calls tx complete, before finally re-enabling rx interrupts and completing NAPI (if below the budget). If the hardware rx queue overflows before the napi complete is called, the hardware will not throw any further rx interrupts and rx processing stops completely. Fix this by keeping NAPI polling scheduled until it completes a poll without receiving any packets, and also handle NAPI completion before refilling rx or completing tx. SVN-Revision: 35942 --- .../files/drivers/net/ethernet/cavium/cns3xxx_eth.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/linux/cns3xxx/files/drivers/net/ethernet/cavium/cns3xxx_eth.c b/target/linux/cns3xxx/files/drivers/net/ethernet/cavium/cns3xxx_eth.c index 7ffff684de..7309d9ea77 100644 --- a/target/linux/cns3xxx/files/drivers/net/ethernet/cavium/cns3xxx_eth.c +++ b/target/linux/cns3xxx/files/drivers/net/ethernet/cavium/cns3xxx_eth.c @@ -706,15 +706,15 @@ static int eth_poll(struct napi_struct *napi, int budget) } } - cns3xxx_alloc_rx_buf(sw, received); - - rx_ring->cur_index = i; - - if (received != budget) { + if (!received) { napi_complete(napi); enable_irq(IRQ_CNS3XXX_SW_R0RXC); } + cns3xxx_alloc_rx_buf(sw, received); + + rx_ring->cur_index = i; + wmb(); enable_rx_dma(sw);